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Data Sheet

V1.4 2014-05

Microcontrollers

XMC1100

Microcontroller Series

for Industrial Applications

XMC1000 Family

ARM

Cortex

™

-M0

32-bit processor core

Summary of content (57 pages)

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XMC1100 Microcontroller Series for Industrial Applications XMC1000 Family ARM® Cortex™-M0 32-bit processor core Data Sheet V1.
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XMC1100 XMC1000 Family XMC1100 Data Sheet Revision History: V1.4 2014-05 Previous Version: V1.3 Page Subjects Page 10 ADC channels of Table 2 is updated. Table 3 is added. Page 10 Description for Chip Identification Number of Section 1.4 is updated. Page 17 The pad type is corrected for P1.6 in Table 6. Page 29 The tC12 , fC12, tC10, fC10, tC8 and fC8 parameters are updated in Table 12. Page 32 Figure 8 is added. Page 33 The tSR and tTSAL parameters are updated in Table 13.
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XMC1100 XMC1000 Family Table of Contents Table of Contents 1 1.1 1.2 1.3 1.4 Summary of Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Device Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device Type Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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XMC1100 XMC1000 Family About this Document About this Document This Data Sheet is addressed to embedded hardware and software developers. It provides the reader with detailed descriptions about the ordering designations, available features, electrical and physical characteristics of the XMC1100 series devices. The document describes the characteristics of a superset of the XMC1100 series devices.
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XMC1100 XMC1000 Family Summary of Features 1 Summary of Features The XMC1100 devices are members of the XMC1000 family of microcontrollers based on the ARM Cortex-M0 processor core. The XMC1100 series devices are designed for general purpose applications. Cortex-M0 CPU Analog system EVR 2 x DCO Debug system NVIC SWD SPD ANACTRL SFRs PRNG 16-bit APB Bus Temperature sensor AHB to APB Bridge PAU AHB-Lite Bus Flash SFRs 64k + 0.
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XMC1100 XMC1000 Family Summary of Features • • – High code density with 32-bit performance – Single cycle 32-bit hardware multiplier – System timer (SysTick) for Operating System support – Ultra low power consumption Nested Vectored Interrupt Controller (NVIC) Event Request Unit (ERU) for programmable processing of external and internal service requests On-Chip Memories • • • 8 kbytes on-chip ROM 16 kbytes on-chip high-speed SRAM up to 64 kbytes on-chip Flash program and data memory On-Chip Peripherals
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XMC1100 XMC1000 Family Summary of Features • • • • the package variant – T: TSSOP – Q: VQFN package pin count the temperature range: – F: -40°C to 85°C – X: -40°C to 105°C the Flash memory size. For ordering codes for the XMC1100 please contact your sales representative or local distributor. This document describes several derivatives of the XMC1100 series, some descriptions may not apply to a specific product. Please see Table 1.
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XMC1100 XMC1000 Family Summary of Features Table 1 Synopsis of XMC1100 Device Types (cont’d) Derivative Package Flash Kbytes SRAM Kbytes XMC1100-Q040F0032 PG-VQFN-40-13 32 16 XMC1100-Q040F0064 PG-VQFN-40-13 64 16 1.3 Device Type Features The following table lists the available features per device type.
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XMC1100 XMC1000 Family Summary of Features Table 4 XMC1100 Chip Identification Number Derivative Value Marking XMC1100-T016F0008 00011032 01CF00FF 00001F37 00000000 00000B00 00001000 00003000 101ED083H AA XMC1100-T016F0016 00011032 01CF00FF 00001F37 00000000 00000B00 00001000 00005000 101ED083H AA XMC1100-T016F0032 00011032 01CF00FF 00001F37 00000000 00000B00 00001000 00009000 101ED083H AA XMC1100-T016F0064 00011032 01CF00FF 00001F37 00000000 00000B00 00001000 00011000 101ED083H AA XMC1100-
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XMC1100 XMC1000 Family General Device Information 2 General Device Information This section summarizes the logic symbols and package pin configurations with a detailed list of the functional I/O mapping. 2.1 Logic Symbols VDDP VSSP (2) (2) VDDP VSSP (1) (1) Port 0 16 bit XMC1100 TSSOP -38 Port 0 8 bit Port 1 6 bit XMC1100 TSSOP-16 Port 2 4 bit Port 2 3 bit Port 2 8 bit Figure 2 Data Sheet Port 2 3 bit XMC1100 Logic Symbol for TSSOP-38 and TSSOP-16 12 V1.
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XMC1100 XMC1000 Family General Device Information V DD VSS VDDP VSSP (1) (1) (2) (1) V DDP VSSP (1) (1) Port 0 10 bit Port 0 16 bit XMC1100 VQFN-40 Port 1 7 bit XMC1100 VQFN-24 Port 2 4 bit Data Sheet Port 2 4 bit Port 2 4 bit Port 2 8 bit Figure 3 Port 1 4 bit XMC1100 Logic Symbol for VQFN-24 and VQFN-40 13 V1.
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XMC1100 XMC1000 Family General Device Information 2.2 Pin Configuration and Definition The following figures summarize all pins, showing their locations on the different packages. P2.4 1 38 P2.3 Top View Figure 4 Data Sheet P2.5 2 37 P2.2 P2.6 3 36 P2.1 P2.7 4 35 P2.0 P2.8 5 34 P0.15 P2.9 6 33 P0.14 P2.10 7 32 P0.13 P2.11 8 31 P0.12 VSSP /VSS 9 30 P0.11 VDDP/VDD 10 29 P0.10 P1.5 11 28 P0.9 P1.4 12 27 P0.8 P1.3 13 26 VDDP P1.2 14 25 VSSP P1.
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XMC1100 XMC1000 Family General Device Information P2.7/P2.8 1 16 P2.6 Top View 2 15 P2.0 P2.10 3 14 P0.15 P2.11 4 13 P0.14 VSSP/VSS 5 12 P0.9 VDDP/VDD 6 11 P0.8 P0.0 7 10 P0.7 P0.5 8 9 P0.6 P1.1 P1.0 P0.0 P0.5 P0.6 XMC1100 PG-TSSOP-16 Pin Configuration (top view) P0.7 Figure 5 P2.9 18 17 16 15 14 13 12 P1.2 P0.9 20 11 P1.3 P0.12 21 10 VDDP /V DD P0.13 22 9 VSSP /V SS P0.14 23 8 P2.11 P0.15 24 7 P2.10 P2.2 4 5 6 P2.9 3 P2.7/P2.8 2 P2.
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XMC1100 XMC1000 Family P1.1 P1.0 P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 General Device Information 30 29 28 27 26 25 24 23 22 21 V SSP 31 20 P1.2 VDDP 32 19 P1.3 P0.8 33 18 P1.4 P0.9 34 17 P1.5 P0.10 35 16 P1.6 P0.11 36 15 VDDP P0.12 37 14 V DD P0.13 38 13 V SS P0.14 39 12 P2.11 P0.15 40 11 P2.10 7 8 9 10 P2.6 P2.7 P2.8 P2.9 6 P2.5 P2.4 P2.2 4 5 P2.3 3 P2.1 Data Sheet 2 P2.
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XMC1100 XMC1000 Family General Device Information 2.2.1 Package Pin Summary The following general building block is used to describe each pin: Table 5 Package Pin Mapping Description Function Package A Package B Px.y N N ... Pad Type Pad Class The table is sorted by the “Function” column, starting with the regular Port pins (Px.y), followed by the supply pins.
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XMC1100 XMC1000 Family General Device Information Table 6 Package Pin Mapping Function VQFN 40 TSSOP VQFN 38 24 TSSOP Pad Type 16 P0.13 38 32 22 - STD_INOUT P0.14 39 33 23 13 STD_INOUT P0.15 40 34 24 14 STD_INOUT P1.0 22 16 14 - High Current P1.1 21 15 13 - High Current P1.2 20 14 12 - High Current P1.3 19 13 11 - High Current P1.4 18 12 - - High Current P1.5 17 11 - - High Current P1.6 16 - - - STD_INOUT P2.0 1 35 1 15 STD_INOUT/AN P2.
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XMC1100 XMC1000 Family General Device Information Table 6 Package Pin Mapping Function VQFN 40 TSSOP VQFN 38 24 TSSOP Pad Type 16 Notes 15 10 10 6 Power I/O port supply VSSP 31 25 - - Power I/O port ground VDDP 32 26 - - Power I/O port supply VSSP Exp. Pad - Exp. Pad - Power Exposed Die Pad The exposed die pad is connected internally to VSSP. For proper operation, it is mandatory to connect the exposed pad to the board ground.
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XMC1100 XMC1000 Family General Device Information 2.2.2 Port I/O Functions The following general building block is used to describe each PORT pin: Table 7 Port I/O Function Description Function Outputs ALT1 P0.0 Pn.y ALTn Inputs HWO0 HWI0 MODA.OUT MODB.OUT MODB.INA MODA.OUT Input Input MODC.INA MODA.INA MODC.INB Pn.y is the port pin name, defining the control and data bits/registers associated with it. As GPIO, the port is under software control. Its input value is read via Pn_IN.
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Data Sheet Table 8 Port I/O Functions Function Outputs ALT1 ALT2 ALT3 ALT4 ALT5 Inputs ALT6 ALT7 HWO0 HWO1 HWI0 HWI1 Input USIC0_CH0. SELO0 USIC0_CH1. SELO0 CCU40.IN0C SCU. VDROP CCU40.IN1C P0.0 ERU0. PDOUT0 ERU0. GOUT0 CCU40.OUT0 P0.1 ERU0. PDOUT1 ERU0. GOUT1 CCU40.OUT1 P0.2 ERU0. PDOUT2 ERU0. GOUT2 CCU40.OUT2 VADC0. EMUX02 CCU40.IN2C P0.3 ERU0. PDOUT3 ERU0. GOUT3 CCU40.OUT3 VADC0. EMUX01 CCU40.IN3C P0.4 CCU40.OUT1 VADC0. EMUX00 WWDT. SERVICE_OU T P0.5 CCU40.
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Data Sheet Table 8 Port I/O Functions (cont’d) Function Outputs ALT3 ALT4 ALT2 P1.6 VADC0. EMUX12 USIC0_CH1.D OUT0 P2.0 ERU0. PDOUT3 CCU40.OUT0 ERU0. GOUT3 USIC0_CH0. DOUT0 USIC0_CH0. SCLKOUT P2.1 ERU0. PDOUT2 CCU40.OUT1 ERU0. GOUT2 USIC0_CH0. DOUT0 USIC0_CH1. SCLKOUT USIC0_CH0.S CLKOUT ALT5 Inputs ALT1 ALT6 ALT7 HWO0 HWO1 HWI0 HWI1 Input Input USIC0_CH0.S USIC0_CH1.S ELO2 ELO3 P2.2 Input Input Input Input Input ERU0.0B0 USIC0_CH0. DX0E USIC0_CH0. DX1E USIC0_CH1.
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XMC1100 XMC1000 Family Electrical Parameter 3 Electrical Parameter This section provides the electrical parameter which are implementation-specific for the XMC1100. 3.1 General Parameters 3.1.1 Parameter Interpretation The parameters listed in this section represent partly the characteristics of the XMC1100 and partly its requirements on the system.
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XMC1100 XMC1000 Family Electrical Parameter 3.1.2 Absolute Maximum Ratings Stresses above the values listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability.
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XMC1100 XMC1000 Family Electrical Parameter 3.1.3 Operating Conditions The following operating conditions must not be exceeded in order to ensure correct operation and reliability of the XMC1100. All parameters specified in the following tables refer to these operating conditions, unless noted otherwise. Table 10 Operating Conditions Parameters Parameter Symbol Values Min. Typ. Max. Unit Note / Test Condition °C Temp. Range F Temp.
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XMC1100 XMC1000 Family Electrical Parameter 3.2 DC Parameters 3.2.1 Input/Output Characteristics Table 11 provides the characteristics of the input/output pins of the XMC1100. Table 11 Input/Output Characteristics (Operating Conditions apply) Parameter Symbol Limit Values Min.
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XMC1100 XMC1000 Family Electrical Parameter Table 11 Input/Output Characteristics (Operating Conditions apply) (cont’d) Parameter Symbol Limit Values Min. Input high voltage on port pins (Large Hysteresis) VIHPL Input Hysteresis1) HYS SR Unit Test Conditions V CMOS Mode (5 V, 3.3 V & 2.2 V)3) V CMOS Mode (5 V), Standard Hysteresis V CMOS Mode (3.3 V), Standard Hysteresis V CMOS Mode (2.2 V), Standard Hysteresis Max. 0.85 × – VDDP CC 0.08 × – VDDP 0.03 × – VDDP 0.02 × – VDDP 0.
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XMC1100 XMC1000 Family Electrical Parameter Table 11 Input/Output Characteristics (Operating Conditions apply) (cont’d) Parameter Symbol Limit Values Min. Unit Test Conditions Max.
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XMC1100 XMC1000 Family Electrical Parameter 3.2.2 Analog to Digital Converters (ADC) Table 12 shows the Analog to Digital Converter (ADC) characteristics. Table 12 ADC Characteristics (Operating Conditions apply) Parameter Supply voltage range (internal reference) Symbol VDD_int SR Values Typ. Max. 1.8 – 3.0 V SHSCFG.AREF = 11B 3.0 – 5.5 V SHSCFG.AREF = 10B 3.0 – 5.5 V SHSCFG.
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XMC1100 XMC1000 Family Electrical Parameter Table 12 ADC Characteristics (Operating Conditions apply) (cont’d) Parameter Symbol Values Min. Gain settings Sample Time GIN CC tsample CC 3 Unit Note / Test Condition 1 – GNCTRxz.GAINy = 00B (unity gain) 3 – GNCTRxz.GAINy = 01B (gain g1) 6 – GNCTRxz.GAINy = 10B (gain g2) 12 – GNCTRxz.GAINy = 11B (gain g3) 1/ VDDP = 5.0 V Typ. – Max. – fADC 3 – – 1/ VDDP = 3.3 V fADC 30 – – 1/ VDDP = 1.
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XMC1100 XMC1000 Family Electrical Parameter Table 12 ADC Characteristics (Operating Conditions apply) (cont’d) Parameter Maximum sample rate in 8-bit mode 3) Symbol fC8 CC Values Min. Typ. Max. – – fADC / Unit Note / Test Condition – 1 sample pending – 2 samples pending 38.5 – – fADC / 54.5 DNL error EADNL CC – ±2.0 – LSB 12 INL error EAINL CC – ±4.0 – LSB 12 Gain error with external EAGAIN CC reference – ±0.5 – % SHSCFG.
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XMC1100 XMC1000 Family Electrical Parameter VAIN 0 VSS 1X VAREF VREFINT 00 1 VREFGND VDD SAR Converter : VAGND CH7 . . CH0 Internal Reference VDDint/ VDD VDDext CHNR REFSEL AREF MC_VADC_AREFPATHS Figure 8 Data Sheet ADC Voltage Supply 32 V1.
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XMC1100 XMC1000 Family Electrical Parameter 3.2.3 Table 13 Temperature Sensor Characteristics Temperature Sensor Characteristics1) Parameter Symbol Values Min. Measurement time Temperature sensor range Sensor Accuracy 2) tM CC − TSR SR -40 TTSAL CC − Typ. Max.
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XMC1100 XMC1000 Family Electrical Parameter 3.2.4 Power Supply Current The total power supply current defined below consists of a leakage and a switching component. Application relevant values are typically lower than those given in the following tables, and depend on the customer's system operating conditions (e.g. thermal connection or used application configurations). Table 14 Power Supply Parameters1) Parameter Symbol Values Min. Typ.
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XMC1100 XMC1000 Family Electrical Parameter Table 15 provides the active current consumption of some modules operating at 5 V power supply at 25° C. The typical values shown are used as a reference guide on the current consumption when these modules are enabled. Table 15 Typical Active Current Consumption1) Active Current Consumption Symbol Limit Values Unit Test Condition Typ. Baseload current ICPUDDC 5.
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XMC1100 XMC1000 Family Electrical Parameter 3.2.5 Flash Memory Parameters Note: These parameters are not subject to production test, but verified by design and/or characterization. Table 16 Flash Memory Parameters Parameter Symbol 6.8 7.1 7.6 ms 102 152 204 μs − 32.2 − μs − 50 − ns 10 − − years NWSFLASH CC 0 0.5 − 0 1.4 − 1 1.
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XMC1100 XMC1000 Family Electrical Parameter 3.3 AC Parameters 3.3.1 Testing Waveforms VD D P VSS 90% 90% 10% 10% tR Figure 9 tF Rise/Fall Time Parameters VD D P VD D P / 2 Test Points VD D P / 2 VSS Figure 10 Testing Waveform, Output Delay VL OAD + 0.1V VL OAD - 0.1V Figure 11 Data Sheet Timing Reference Points VOH - 0.1V VOL + 0.1V Testing Waveform, Output High Impedance 37 V1.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.2 Output Rise/Fall Times Table 17 provides the characteristics of the output rise/fall times in the XMC1100. Figure 9 describes the rise time and fall time parameters. Table 17 Output Rise/Fall Times Parameters (Operating Conditions apply) Parameter Rise/fall times on High Current Pad1)2) Rise/fall times on Standard Pad1)2) Symbol tHCPR, tHCPF tR, tF Limit Values Unit Test Conditions Min. Max. – 9 ns 50 pF @ 5 V3) – 12 ns 50 pF @ 3.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.3 Power-Up and Supply Threshold Charcteristics Table 18 provides the characteristics of the supply threshold in XMC1100. Table 18 Power-Up and Supply Threshold Parameters (Operating Conditions apply) 1) Parameter Symbol Values VDDP ramp-up time tRAMPUP SR VDDP/ − SVDDPrise 107 μs VDDP slew rate SVDDPOP SR 0 − 0.
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XMC1100 XMC1000 Family Electrical Parameter 3) Valid for a 100 nF buffer capacitor connected to supply pin where current from capacitor is forwarded only to the chip. A larger capacitor value has to be chosen if the power source sink a current. 4) This values does not include the ramp-up time. During startup firmware execution, MCLK is running at 32 MHz and the clocks to peripheral as specified in register CGATSTAT0 are gated. 5.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.4 On-Chip Oscillator Characteristics Table 19 provides the characteristics of the 64 MHz clock output from the digital controlled oscillator, DCO1 in XMC1100. Table 19 64 MHz DCO1 Characteristics (Operating Conditions apply) Parameter Symbol Limit Values Nominal frequency fNOM CC 63.5 64 64.5 MHz under nominal conditions1) after trimming Accuracy ΔfLT -1.7 – 3.4 % with respect to fNOM(typ), over temperature (0 °C to 85 °C)2) -3.9 – 4.
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XMC1100 XMC1000 Family Electrical Parameter Figure 13 shows the typical curves for the accuracy of DCO1, with and without calibration based on temperature sensor, respectively. 4.00 3.00 Accuracy [%] 2.00 Without calibration based on temperature sensor 1.00 With calibration based on temperature sensor 0.00 - 1.00 - 2.00 - 3.00 - 4.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.5 Serial Wire Debug Port (SW-DP) Timing The following parameters are applicable for communication through the SW-DP interface. Note: These parameters are not subject to production test, but verified by design and/or characterization. Table 21 SWD Interface Timing Parameters(Operating Conditions apply) Parameter Symbol Values Unit Note / Test Condition Min. Typ. Max.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.6 SPD Timing Requirements The optimum SPD decision time between 0B and 1B is 0.75 µs. With this value the system has maximum robustness against frequency deviations of the sampling clock on tool and on device side. However it is not always possible to exactly match this value with the given constraints for the sample clock.
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XMC1100 XMC1000 Family Electrical Parameter 3.3.7 Peripheral Timings Note: These parameters are not subject to production test, but verified by design and/or characterization. 3.3.7.1 Synchronous Serial Interface (USIC SSC) Timing The following parameters are applicable for a USIC channel operated in SSC mode. Note: Operating Conditions apply. Table 23 USIC SSC Master Mode Timing Parameter Symbol Values Min. Unit Typ. Max.
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XMC1100 XMC1000 Family Electrical Parameter Table 24 USIC SSC Slave Mode Timing (cont’d) Parameter Symbol Values Min. Unit Typ. Max.
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XMC1100 XMC1000 Family Electrical Parameter Master Mode Timing t1 Select Output SELOx t2 Inactive Inactive Active Clock Output SCLKOUT Receive Edge First Transmit Edge t3 Last Receive Edge Transmit Edge t3 Data Output DOUT[3:0] t4 Data Input DX0/DX[5:3] t4 t5 Data valid t5 Data valid Slave Mode Timing t1 0 Select Input DX2 Clock Input DX1 t1 1 Active Inactive Receive Edge First Transmit Edge t1 2 Data Input DX0/DX[5:3] Inactive Last Receive Edge Transmit Edge t1 2 t1 3 Data v
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XMC1100 XMC1000 Family Electrical Parameter 3.3.7.2 Inter-IC (IIC) Interface Timing The following parameters are applicable for a USIC channel operated in IIC mode. Note: Operating Conditions apply. Table 25 USIC IIC Standard Mode Timing1) Parameter Symbol Values Unit Min. Typ. Max. Fall time of both SDA and t1 SCL CC/SR - - 300 ns Rise time of both SDA and t2 SCL CC/SR - - 1000 ns 0 - - µs 250 - - ns 4.7 - - µs 4.0 - - µs 4.0 - - µs 4.7 - - µs 4.0 - - µs 4.
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XMC1100 XMC1000 Family Electrical Parameter Table 26 USIC IIC Fast Mode Timing 1) Parameter Symbol Values Min. Fall time of both SDA and t1 SCL CC/SR Typ. Unit Max. 20 + 0.1*Cb 300 ns 20 + 0.1*Cb 300 ns 0 - - µs 100 - - ns 1.3 - - µs 0.6 - - µs 0.6 - - µs 0.6 - - µs 0.6 - - µs 1.
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XMC1100 XMC1000 Family Electrical Parameter t1 SDA t2 t4 70% 30% t1 t3 t2 t6 SCL th t7 9 clock t5 t10 S SDA t8 t7 t9 SCL th 9 clock Sr Figure 16 3.3.7.3 P S USIC IIC Stand and Fast Mode Timing Inter-IC Sound (IIS) Interface Timing The following parameters are applicable for a USIC channel operated in IIS mode. Note: Operating Conditions apply. Table 27 USIC IIS Master Transmitter Timing Parameter Clock period Clock HIGH Symbol t1 CC t2 CC Values Min. Typ. Max.
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XMC1100 XMC1000 Family Electrical Parameter t1 t2 t5 t3 SCK t4 WA/ DOUT Figure 17 USIC IIS Master Transmitter Timing Table 28 USIC IIS Slave Receiver Timing Parameter Symbol t6 SR t7 SR Clock period Clock HIGH Values Unit Min. Typ. Max. 4/fMCLK - - ns 0.35 x - - ns - - ns - - ns - - ns Note / Test Condition t6min t8 SR Clock Low 0.35 x t6min t9 SR Set-up time 0.
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XMC1100 XMC1000 Family Package and Reliability 4 Package and Reliability The XMC1100 is a member of the XMC1000 Derivatives of microcontrollers. It is also compatible to a certain extent with members of similar families or subfamilies. Each package is optimized for the device it houses. Therefore, there may be slight differences between packages of the same pin-count but for different device types. In particular, the size of the exposed die pad may vary.
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XMC1100 XMC1000 Family Package and Reliability The internal power consumption is defined as PINT = VDDP × IDDP (switching current and leakage current). The static external power consumption caused by the output drivers is defined as PIOSTAT = Σ((VDDP-VOH) × IOH) + Σ(VOL × IOL) The dynamic external power consumption caused by the output drivers (PIODYN) depends on the capacitive load connected to the respective pins and their switching frequencies.
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XMC1100 XMC1000 Family Package and Reliability 4.2 Figure 19 Data Sheet Package Outlines PG-TSSOP-38-9 54 V1.
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XMC1100 XMC1000 Family Package and Reliability Figure 20 Data Sheet PG-TSSOP-16-8 55 V1.
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XMC1100 XMC1000 Family Package and Reliability Figure 21 Data Sheet PG-VQFN-24-19 56 V1.
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XMC1100 XMC1000 Family Package and Reliability Figure 22 PG-VQFN-40-13 All dimensions in mm. Data Sheet 57 V1.
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XMC1100 XMC1000 Family Quality Declaration 5 Quality Declaration Table 30 shows the characteristics of the quality parameters in the XMC1100. Table 30 Quality Parameters Parameter Symbol Limit Values Unit Notes Min. Max.
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