Datasheet

XMC1100
XMC1000 Family
Electrical Parameter
Data Sheet 49 V1.4, 2014-05
Table 26 USIC IIC Fast Mode Timing
1)
1) Due to the wired-AND configuration of an IIC bus system, the port drivers of the SCL and SDA signal lines
need to operate in open-drain mode. The high level on these lines must be held by an external pull-up device,
approximalely 10 kOhm for operation at 100 kbit/s, approximately 2 kOhm for operation at 400 kbit/s.
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Fall time of both SDA and
SCL
t
1
CC/SR
20 +
0.1*C
b
2)
2) C
b
refers to the total capacitance of one bus line in pF.
- 300 ns
Rise time of both SDA and
SCL
t
2
CC/SR
20 +
0.1*C
b
- 300 ns
Data hold time
t
3
CC/SR
0- - µs
Data set-up time
t
4
CC/SR
100 - - ns
LOW period of SCL clock
t
5
CC/SR
1.3 - - µs
HIGH period of SCL clock
t
6
CC/SR
0.6 - - µs
Hold time for (repeated)
START condition
t
7
CC/SR
0.6 - - µs
Set-up time for repeated
START condition
t
8
CC/SR
0.6 - - µs
Set-up time for STOP
condition
t
9
CC/SR
0.6 - - µs
Bus free time between a
STOP and START
condition
t
10
CC/SR
1.3 - - µs
Capacitive load for each
bus line
C
b
SR - - 400 pF
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