Datasheet

XMC1100
XMC1000 Family
Summary of Features
Data Sheet 8 V1.4, 2014-05
– High code density with 32-bit performance
– Single cycle 32-bit hardware multiplier
– System timer (SysTick) for Operating System support
– Ultra low power consumption
• Nested Vectored Interrupt Controller (NVIC)
• Event Request Unit (ERU) for programmable processing of external and internal
service requests
On-Chip Memories
• 8 kbytes on-chip ROM
• 16 kbytes on-chip high-speed SRAM
• up to 64 kbytes on-chip Flash program and data memory
On-Chip Peripherals
• Two Universal Serial Interface Channels (USIC), usable as UART, double-SPI,
quad-SPI, IIC, IIS and LIN interfaces
• A/D Converters, up to 12 channels, includes a 12-bit analog to digital converter
• Capture/Compare Units 4 (CCU4) for use as general purpose timers
• Window Watchdog Timer (WDT) for safety sensitive applications
• Real Time Clock module with alarm support (RTC)
• System Control Unit (SCU) for system configuration and control
• Pseudo random number generator (PRNG), provides random data with fast
generation times
• Temperature Sensor (TSE)
Input/Output Lines
• Programmable port driver control module (PORTS)
• Individual bit addressability
• Tri-stated in input mode
• Push/pull or open drain output mode
• Configurable pad hysteresis
On-Chip Debug Support
• Support for debug features: 4 breakpoints, 2 watchpoints
• Various interfaces: ARM serial wire debug (SWD), single pin debug (SPD)
1.1 Ordering Information
The ordering code for an Infineon microcontroller provides an exact reference to a
specific product. The code “XMC1<DDD>-<Z><PPP><T><FFFF>” identifies:
• <DDD> the derivatives function set
Subject to Agreement on the Use of Product Information