Datasheet

C161K
C161O
Data Sheet 48 V2.0, 2001-01
Figure 13 External Memory Cycle:
Multiplexed Bus, With Read/Write Delay, Extended ALE
Address
Address
Data OUTAddress
Data IN
MCT04862
A21-A16
(A15-A8)
BHE, CSxE
ALE
CSxL
BUS
RD
RdCSx
Read Cycle
BUS
Write Cycle
t
5
t
16
t
25
t
38
t
39
t
40
t
27
t
17
t
7
t
19
t
54
t
18
t
8
t
10
t
12
t
42
t
4
t
52
t
51
t
48
t
23
t
8
t
10
t
14
t
46
t
22
t
56
WR, WRL,
WRH
WrCSx
t
12
t
42
t
44
t
48
t
50
t
6