Datasheet

&3,
Data Sheet 12 1999-07

Note: The following behaviour differences must be observed when the bidirectional reset
is active:
• Bit BDRSTEN in register SYSCON cannot be changed after EINIT and is cleared
automatically after a reset.
• The reset indication flags always indicate a long hardware reset.
• The PORT0 configuration is treated like on a hardware reset. Especially the bootstrap
loader may be activated when P0L.4 is low.
• Pin RSTIN
may only be connected to external reset devices with an open drain output
driver.
• A short hardware reset is extended to the duration of the internal reset sequence.
9
DD
6, 23,
37,
47,
65, 75
8, 25,
39,
49,
67, 77
- Digital Supply Voltage:
+ 5 V or + 3 V during normal operation and idle mode.
≥ 2.5 V during power down mode
9
SS
3, 22,
36,
46,
64, 74
5, 24,
38,
48,
66, 76
- Digital Ground.
Table 1 Pin Definitions and Functions (continued)
Symbol Pin
Num.
TQFP
Pin
Num.
MQFP
Input
Outp.
Function