Datasheet

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Data Sheet 33 1999-07
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IDPROG F078
H
E 3C
H
Identifier 0000
H
ISNC b F1DE
H
E EF
H
Interrupt Subnode Control Register 0000
H
MDC b FF0E
H
87
H
CPU Multiply Divide Control Register 0000
H
MDH FE0C
H
06
H
CPU Multiply Divide Reg. – High Word 0000
H
MDL FE0E
H
07
H
CPU Multiply Divide Reg. – Low Word 0000
H
ODP2 b F1C2
H
E E1
H
Port 2 Open Drain Control Register 0000
H
ODP3 b F1C6
H
E E3
H
Port 3 Open Drain Control Register 0000
H
ODP6 b F1CE
H
E E7
H
Port 6 Open Drain Control Register 00
H
ONES b FF1E
H
8F
H
Constant Value 1’s Register (read only) FFFF
H
P0L b FF00
H
80
H
Port 0 Low Reg. (Lower half of PORT0) 00
H
P0H b FF02
H
81
H
Port 0 High Reg. (Upper half of PORT0) 00
H
P1L b FF04
H
82
H
Port 1 Low Reg. (Lower half of PORT1) 00
H
P1H b FF06
H
83
H
Port 1 High Reg. (Upper half of PORT1) 00
H
P2 b FFC0
H
E0
H
Port 2 Register 0000
H
P3 b FFC4
H
E2
H
Port 3 Register 0000
H
P4 b FFC8
H
E4
H
Port 4 Register (7 bits) 00
H
P5 b FFA2
H
D1
H
Port 5 Register (read only) XXXX
H
P5DIDIS b FFA4
H
D2
H
Port 5 Digital Input Disable Register 0000
H
P6 b FFCC
H
E6
H
Port 6 Register (8 bits) 00
H
PECC0 FEC0
H
60
H
PEC Channel 0 Control Register 0000
H
PECC1 FEC2
H
61
H
PEC Channel 1 Control Register 0000
H
PECC2 FEC4
H
62
H
PEC Channel 2 Control Register 0000
H
PECC3 FEC6
H
63
H
PEC Channel 3 Control Register 0000
H
PECC4 FEC8
H
64
H
PEC Channel 4 Control Register 0000
H
PECC5 FECA
H
65
H
PEC Channel 5 Control Register 0000
H
PECC6 FECC
H
66
H
PEC Channel 6 Control Register 0000
H
PECC7 FECE
H
67
H
PEC Channel 7 Control Register 0000
H
PSW b FF10
H
88
H
CPU Program Status Word 0000
H
PDCR F0AA
H
E 55
H
Pin Driver Control Register 0000
H
RP0H b F108
H
E 84
H
System Startup Config. Reg. (Rd. only) XX
H
Table 5 C161PI Registers, Ordered by Name (continued)
Name Physical
Address
8-Bit
Addr.
Description Reset
Value