Datasheet

C515C
Data Sheet 18 2003-02
The XRAM/CAN controller can be accessed by read/write instructions (MOVX A,DPTR,
MOVX @DPTR,A), which use the 16-bit DPTR for indirect addressing. For accessing the
XRAM or CAN controller, the effective address stored in DPTR must be in the range of
F700
H
to FFFF
H
.
The XRAM can be also accessed by read/write instructions (MOVX A,@Ri, MOVX
@Ri,A), which use only an 8-bit address (indirect addressing with registers R0 or R1).
Therefore, a special page register XPAGE which provides the upper address information
(A8-A15) during 8-bit XRAM accesses. The behaviour of Port 0 and P2 during a MOVX
access depends on the control bits XMAP0 and XMAP1 in register SYSCON and on the
state of pin
EA. Table 3 lists the various operating conditions.