Datasheet

C515C
Data Sheet 29 2003-02
D0
H
2)
PSW 00
H
CY AC F0 RS1 RS0 OV F1 P
D8
H
2)
ADCON0 00
H
BD CLK ADEX BSY ADM MX2 MX1 MX0
D9
H
ADDATH 00
H
.9 .8 .7 .6 .5 .4 .3 .2
DA
H
ADDATL 00XX-
XXXX
B
.1 .0––––
DB
H
P6 .7 .6 .5 .4 .3 .2 .1 .0
DC
H
ADCON1 0XXX-
X000
B
ADCL 0 MX2 MX1 MX0
E0
H
2)
ACC 00
H
.7 .6 .5 .4 .3 .2 .1 .0
E8
H
2)
P4 FF
H
RXDC TXDC INT8 SLS STO SRI SCLK ADST
F0
H
2)
B 00
H
.7 .6 .5 .4 .3 .2 .1 .0
F8
H
2)
P5 FF
H
.7 .6 .5 .4 .3 .2 .1 .0
F8
H
2)
DIR5
6)
FF
H
.7 .6 .5 .4 .3 .2 .1 .0
FA
H
P7 XXXX-
XXX1
B
–––– INT7
FC
H
VR0
7)8)
C5
H
1 10001 0 1
FD
H
VR1
7)8)
95
H
1 00101 0 1
FE
H
VR2
7)8)
02
H
9)
0 00000 1 0
1)
“X” means that the value is undefined and the location is reserved.
2)
Bit-addressable special function registers
3)
SFR is located in the mapped SFR area. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
4)
This SFR is available in the C515C-8R and C515C-L.
5)
This SFR is available in the C515C-8E.
6)
This SFR is a mapped SFR. For accessing this SFR, bit PDIR in SFR IP1 must be set.
7)
This SFR is a mapped SFR. For accessing this SFR, bit RMAP in SFR SYSCON must be set.
8)
These SFRs are read-only registers (C515C-8E only).
9)
The content of this SFR varies with the actual step of the C515C-8E (e.g. 01
H
for the first step).
Table 5 Contents of the SFRs, SFRs in Numeric Order
of their Addresses (cont’d)
Addr. Register Content
after
Reset
1)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0