Datasheet

C515C
Data Sheet 57 2003-02
Table 11 Power Saving Modes Overview
Mode Entering
(2-Instruction
Example)
Leaving by Remarks
Idle mode ORL PCON, #01
H
ORL PCON, #20
H
Occurrence of an
interrupt from a
peripheral unit
CPU clock is stopped;
CPU maintains their data;
peripheral units are active (if
enabled) and provided with
clock
Hardware Reset
Software
Power-Down
Mode
ORL PCON, #02
H
ORL PCON, #40
H
Hardware Reset Oscillator is stopped;
contents of on-chip RAM
and SFR’s are maintained;
Short low pulse at
pin P3.2/INT0
(or P4.7/RXDC
,
C515C-8E only)
Hardware
Power-Down
Mode
HWPD
= low HWPD = high C515C is put into its reset
state and the oscillator is
stopped;
ports become floating
outputs
Slow Down
Mode
ORL PCON, #10
H
ANL PCON, #0EF
H
or
Hardware Reset
Oscillator frequency is
reduced to 1/32 of its
nominal frequency