Datasheet

C515C
Data Sheet 67 2003-02
DC Characteristics (Operating Conditions apply)
Parameter Sym-
bol
Limit Values Unit Test
Condition
min. max.
Input low voltages all except
EA
, RESET, HWPD
EA pin
RESET
and HWPD pins
Port 5 in CMOS mode
V
IL
V
IL1
V
IL2
V
ILC
-0.5
-0.5
-0.5
-0.5
0.2
V
DD
- 0.1
0.2
V
DD
- 0.3
0.2
V
DD
+ 0.1
0.3
V
DD
V–
Input high voltages
all except XTAL2, RESET
,
and HWPD
)
XTAL2 pin
RESET
and HWPD pins
Port 5 in CMOS mode
V
IH
V
IH1
V
IH2
V
IHC
0.2 V
DD
+ 0.9
0.7
V
DD
0.6 V
DD
0.7 V
DD
V
DD
+ 0.5
V
DD
+ 0.5
V
DD
+ 0.5
V
DD
+ 0.5
V–
Output low voltages
Ports 1, 2, 3, 4, 5, 7 (incl. CMOS)
Port 0, ALE, PSEN
, CPUR
P4.1, P4.3 in push-pull mode
V
OL
V
OL1
V
OL3
0.45
0.45
0.45
V
I
OL
= 1.6 mA
1)
I
OL
= 3.2 mA
1)
I
OL
= 3.75 mA
1)
Output high voltages
Ports 1, 2, 3, 4, 5, 7
Port 0 in external bus mode,
ALE, PSEN
, CPUR
Port 5 in CMOS mode
P4.1, P4.3 in push-pull mode
V
OH
V
OH2
V
OHC
V
OH3
2.4
0.9
V
DD
2.4
0.9
V
DD
0.9 V
DD
0.9 V
DD
V
I
OH
= -80 µA
I
OH
= -10 µA
I
OH
= -800 µA
I
OH
= -80 µA
2)
I
OH
= -800 µA
I
OH
= -833 µA
Logic 0 input current
Ports 1, 2, 3, 4, 5, 7
I
IL
-10 -70 µA V
IN
= 0.45 V
Logical 0-to-1 transition current
Ports 1, 2, 3, 4, 5, 7
I
TL
-65 -650 µA V
IN
= 2 V
Input leakage current
Port 0, EA
, P6, HWPD, AIN0-7
I
LI
±1 µA0.45 < V
IN
< V
DD
Input low current
To RESET
for reset
XTAL2
PE
/SWD
I
LI2
I
LI3
I
LI4
-100
-15
-20
µA
V
IN
= 0.45 V
V
IN
= 0.45 V
V
IN
= 0.45 V
Pin capacitance
C
IO
–10pFf
c
= 1 MHz,
T
A
= 25 °C
Overload current
I
OV
±5mA
3)4)
Programming voltage V
PP
10.9 12.1 V 11.5 V ± 5%