Datasheet

C515C
Data Sheet 86 2003-02
Figure 37 Lock Bit Access Timing
H, L H, L
D0, D1 D0, D1
t
PCS
PMS
t
PMH
t
t
PCH
PWW
t
PMS
t
PRD
t
t
PDH
PDF
t
PMH
t
PRW
t
MCT03393
PMSEL1,0
Port 0
PROG
PRD
PALE should be low during a lock bit read / write cycle.Note: