Datasheet

C167CR
C167SR
General Device Information
Data Sheet 15 V3.3, 2005-02
RSTIN 140 I/O Reset Input with Schmitt-Trigger characteristics. A low level
at this pin while the oscillator is running resets the C167CR.
An internal pull-up resistor permits power-on reset using only
a capacitor connected to
V
SS
.
A spike filter suppresses input pulses < 10 ns. Input pulses
> 100 ns safely pass the filter. The minimum duration for a
safe recognition should be 100 ns + 2 CPU clock cycles.
In bidirectional reset mode (enabled by setting bit BDRSTEN
in register SYSCON) the RSTIN
line is internally pulled low
for the duration of the internal reset sequence upon any reset
(HW, SW, WDT). See note below this table.
Note: To let the reset configuration of PORT0 settle and to let
the PLL lock a reset duration of ca. 1 ms is
recommended.
RST
OUT
141 O Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or
a watchdog timer reset. RSTOUT
remains low until the EINIT
(end of initialization) instruction is executed.
NMI
142 I Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI
pin must be low in order to force the C167CR to go into power
down mode. If NMI
is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI
should be pulled high externally.
V
AREF
37 – Reference voltage for the A/D converter.
V
AGND
38 – Reference ground for the A/D converter.
Table 2 Pin Definitions and Functions P-MQFP-144-8 (cont’d)
Symbol Pin
No.
Input
Outp.
Function