Datasheet

C167CR
C167SR
Functional Description
Data Sheet 54 V3.3, 2005-02
DP4 b FFCA
H
E5
H
Port 4 Direction Control Register 00
H
DP6 b FFCE
H
E7
H
Port 6 Direction Control Register 00
H
DP7 b FFD2
H
E9
H
Port 7 Direction Control Register 00
H
DP8 b FFD6
H
EB
H
Port 8 Direction Control Register 00
H
DPP0 FE00
H
00
H
CPU Data Page Pointer 0 Reg. (10 bits) 0000
H
DPP1 FE02
H
01
H
CPU Data Page Pointer 1 Reg. (10 bits) 0001
H
DPP2 FE04
H
02
H
CPU Data Page Pointer 2 Reg. (10 bits) 0002
H
DPP3 FE06
H
03
H
CPU Data Page Pointer 3 Reg. (10 bits) 0003
H
EXICON b F1C0
H
E E0
H
External Interrupt Control Register 0000
H
MDC b FF0E
H
87
H
CPU Multiply Divide Control Register 0000
H
MDH FE0C
H
06
H
CPU Multiply Divide Reg. – High Word 0000
H
MDL FE0E
H
07
H
CPU Multiply Divide Reg. – Low Word 0000
H
ODP2 b F1C2
H
E E1
H
Port 2 Open Drain Control Register 0000
H
ODP3 b F1C6
H
E E3
H
Port 3 Open Drain Control Register 0000
H
ODP6 b F1CE
H
E E7
H
Port 6 Open Drain Control Register 00
H
ODP7 b F1D2
H
E E9
H
Port 7 Open Drain Control Register 00
H
ODP8 b F1D6
H
E EB
H
Port 8 Open Drain Control Register 00
H
ONES FF1E
H
8F
H
Constant Value 1’s Register (read only) FFFF
H
P0H b FF02
H
81
H
Port 0 High Reg. (Upper half of PORT0) 00
H
P0L b FF00
H
80
H
Port 0 Low Reg. (Lower half of PORT0) 00
H
P1H b FF06
H
83
H
Port 1 High Reg. (Upper half of PORT1) 00
H
P1L b FF04
H
82
H
Port 1 Low Reg. (Lower half of PORT1) 00
H
P2 b FFC0
H
E0
H
Port 2 Register 0000
H
P3 b FFC4
H
E2
H
Port 3 Register 0000
H
P4 b FFC8
H
E4
H
Port 4 Register (8 bits) 00
H
P5 b FFA2
H
D1
H
Port 5 Register (read only) XXXX
H
P5DIDIS b FFA4
H
D2
H
Port 5 Digital Input Disable Register 0000
H
P6 b FFCC
H
E6
H
Port 6 Register (8 bits) 00
H
P7 b FFD0
H
E8
H
Port 7 Register (8 bits) 00
H
P8 b FFD4
H
EA
H
Port 8 Register (8 bits) 00
H
Table 8 C167CR Registers, Ordered by Name (cont’d)
Name Physical
Address
8-Bit
Addr.
Description Reset
Value