Datasheet

C167CR

C167SR

Electrical Parameters

Data Sheet 69 V3.3, 2005-02

Direct Drive

When direct drive is configured (CLKCFG = 011

) the on-chip phase locked loop is

disabled and the CPU clock is directly driven from the internal oscillator with the input

clock signal.

The frequency of

CPU

directly follows the frequency of f

OSC

so the high and low time of

CPU

(i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock

OSC

The timings listed below that refer to TCLs therefore must be calculated using the

minimum TCL that is possible under the respective circumstances. This minimum value

can be calculated via the following formula:

TCL

min

= 1/f

OSC

× DC

min

(DC = duty cycle) (2)

For two consecutive TCLs the deviation caused by the duty cycle of

OSC

is compensated

so the duration of 2TCL is always 1/

OSC

. The minimum value TCL

min

therefore has to be

used only once for timings that require an odd number of TCLs (1, 3, …). Timings that

require an even number of TCLs (2, 4, …) may use the formula 2TCL = 1/

OSC