Datasheet

C167CS-4R
C167CS-L
Data Sheet 9 V2.2, 2001-08
P4
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
85
86
87
88
89
90
91
92
IO
O
O
O
O
O
I
O
I
O
O
O
O
I
O
I
Port 4 is an 8-bit bidirectional I/O port. It is bit-wise
programmable for input or output via direction bits. For a pin
configured as input, the output driver is put into high-
impedance state. The Port 4 outputs can be configured as
push/pull or open drain drivers. The input threshold of Port 4
is selectable (TTL or special).
Port 4 can be used to output the segment address lines and
for serial interface lines:
1)
A16 Least Significant Segment Address Line
A17 Segment Address Line
A18 Segment Address Line
A19 Segment Address Line
A20 Segment Address Line,
CAN2_RxD CAN 2 Receive Data Input
A21 Segment Address Line,
CAN1_RxD CAN 1 Receive Data Input
A22 Segment Address Line,
CAN1_TxD CAN 1 Transmit Data Output,
CAN2_TxD CAN 2 Transmit Data Output
A23 Most Significant Segment Address Line,
CAN1_RxD CAN 1 Receive Data Input,
CAN2_TxD CAN 2 Transmit Data Output,
CAN2_RxD CAN 2 Receive Data Input
RD
95 O External Memory Read Strobe. RD is activated for every
external instruction or data read access.
WR
/
WRL
96 O External Memory Write Strobe. In WR-mode this pin is
activated for every external data write access. In WRL
-mode
this pin is activated for low byte data write accesses on a
16-bit bus, and for every data write access on an 8-bit bus.
See WRCFG in register SYSCON for mode selection.
READY 97 I Ready Input. When the Ready function is enabled, a high
level at this pin during an external memory access will force
the insertion of memory cycle time waitstates until the pin
returns to a low level.
An internal pullup device will hold this pin high when nothing
is driving it.
Table 2 Pin Definitions and Functions (contd)
Symbol Pin
Num.
Input
Outp.
Function