Datasheet

C167CS-4R
C167CS-L
Data Sheet 65 V2.2, 2001-08
The bandwidth of a parameter (minimum and maximum value) covers the whole
operating range (temperature, voltage) as well as process variations. Within a given
device, however, this bandwidth is smaller than the specified range. This is also due to
interdependencies between certain parameters. Some of these interdependencies are
described as relative timing (see below) or in additional notes (see standard timing).
General Notes For The Following Bus Timing Figures
These standard notes apply to all subsequent timing figures. Additional individual notes
are placed at the respective figure.
1)
The falling edge of signals RD and WR/WRH/WRL/WrCS is controlled by the Read/Write delay feature
(bit BUSCON.RWDCx).
2)
The rising edge of signal WR/WRH/WRL/WrCS is controlled by the early write feature (bit BUSCON.EWENx).
3)
A bus cycle is extended here, if MCTC waitstates are selected or if the READY input is sampled inactive.
4)
A bus cycle is extended here, if an MTTC waitstate is selected.
Table 18 External Bus Relative Timing (Operating Conditions apply)
1)
1)
Not 100% tested, guaranteed by design and characterization.
Parameter Symbol Limits Unit
min. max.
Output hold time after WR
rising edge
2)
Valid for: address, write data out
2)
See also note
3)
in Table 17.
t
50
CC 0 – ns
Input hold time after RD
rising edge
Valid for: read data in
t
51
SR – 0ns