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TLE4253

Low Dropout Voltage Tracking Regulator

Data Sheet, Rev. 1.2, November 2009

Automotive Power

Summary of content (22 pages)

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Data Sheet, Rev. 1.
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Low Dropout Voltage Tracking Regulator TLE4253 1 TLE4253GS Overview Features • • • • • • • • • • • • • • • • • Tight output tracking tolerance to reference Output voltage adjust down to 2.
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TLE4253 Block Diagram 2 Block Diagram Saturation Control and Protection circuits Temperature control I Q - TLE 4253 FB + EN/ ADJ + typ. 1.4V = GND Figure 1 Data Sheet Block Diagram 3 Rev. 1.
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TLE4253 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Q 1 8 I GND 2 7 GND 3 FB 4 TLE4253GS Q 1 8 I GND n. c. 2 7 n. c. 6 GND n. c. 3 6 GND 5 EN/ADJ FB 4 5 EN/ADJ Figure 2 Pin Configuration and Block Diagram 3.2 Pin Definitions and Functions TLE4253E Pin Symbol Function 1 Q Tracker Output. Block to GND with a capacitor close to the IC terminals, respecting capacitance and ESR requirements given in the table “Functional Range”.
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TLE4253 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified). Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VI VQ VADJ/EN VFB -42 45 V – -2 45 V – -42 45 V – -42 45 V – Tj Tstg -40 150 °C – -50 150 °C – VESD,HBM VESD,CDM -4 4 kV HBM2) -1 1 kV CDM3) Voltages 4.1.1 Input voltage 4.1.
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TLE4253 General Product Characteristics 4.2 Pos. Functional Range Parameter Symbol 4.2.1 Input Voltage 4.2.1 Adjust / Enable Input Voltage (Voltage Tracking Range) 4.2.2 Junction Temperature 4.2.3 Output Capacitor Requirements 4.2.4 Limit Values Unit Conditions Min. Max. VI VADJ/EN 3.5 40 V VI ≥ VQ + Vdr 2.0 – V – Tj CQ ESRCQ -40 150 °C – µF –1) Ω –2) 10 – 5 1) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.
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TLE4253 Electrical Characteristics 5 Electrical Characteristics 5.1 Tracking Regulator The output voltage VQ is controlled by comparing it to the voltage applied at pin ADJ/EN and driving a PNP pass transistor accordingly. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the poles/zeros introduced by the integrated circuit.
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TLE4253 Electrical Characteristics Table 1 Electrical Characteristics Tracking Regulator VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified). Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Test Condition 5.1.7 Dropout Voltage Vdr = VI - VQ Vdr – 280 600 mV IQ = 200 mA 2) 5.1.8 Output Current Limitation IQ,max 251 400 600 mA 5.1.9 Reverse Current IQ -10 -5.5 – mA 5.1.
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TLE4253 Electrical Characteristics Typical Performance Characteristics Tracking Regulator VADJ/EN = 5 V; VFB = VQ (unless otherwise noted) Output Voltage VQ vs. Adjust Voltage VADJ Output Voltage VQ vs. Input Voltage VI VQ-VADJ.vsd V Q [V] VQ-VI.vsd VI = 13.5 V V Q [V] Vdr 5 4 4 3 3 VADJ = 5 V 2 2 T j = 150 °C T j = -40 °C Tj = -40 °C 1 1 T j = 150 °C 1 2 3 1 4 5 3 7 VADJ [V] VI [V] Output Current Limitation IQ,max vs. Input Voltage VI Output Current Limitation IQ,max vs.
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TLE4253 Electrical Characteristics Typical Performance Characteristics Tracking Regulator VADJ/EN = 5 V; VFB = VQ (unless otherwise noted) Output Capacitor Series Resistor ESRCQ vs. Output Current IQ 10 Output Capacitor Series Resistor ESRCQ vs. Output Current IQ 10 ESR-IQ_10u.vsd ESR-IQ_6u8.vsd ESR CQ ESR CQ [Ω] [Ω] Stable Region 1 Stable Region 1 0.1 0.1 C Q = 10 µF 6 V < VI < 28 V -40 °C < T j < 150 °C 0.01 0 50 100 150 C Q = 6.8 µF 6 V < VI < 28 V -40 °C < T j < 150 °C 0.
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TLE4253 Electrical Characteristics Typical Performance Characteristics Tracking Regulator VADJ/EN = 5 V; VFB = VQ (unless otherwise noted) Load Regulation dVQ,line vs. Output Current Change dIQ Tracking Accuracy ∆VQ vs. Junction Temperature Tj dVQ-Tj.vsd dVQ-dIQ.vsd ∆VQ ∆ VQ [mV] [mV] I Q,initial = 0 mA VADJ = 5 V 2 0 IQ = 0.
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TLE4253 Electrical Characteristics Typical Performance Characteristics Tracking Regulator VADJ/EN = 5 V; VFB = VQ (unless otherwise noted) Dropout Voltage Vdr vs. Output Current IQ Dropout Voltage Vdr vs. Junction Temperature Tj Vdr-IQ_log.vsd Vdr-Tj.vsd 600 V dr [mV] V dr [mV] 1000 I Q = 200 mA 400 100 300 Tj = 150 °C 200 10 Tj = 25 °C 100 1 0.2 10 100 -40 -20 0 20 40 60 80 100 120 140 T j [°C] IQ [mA] Reverse Current II vs. Input Voltage VI Reverse Output Current IQ vs.
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TLE4253 Electrical Characteristics 5.2 Current Consumption Table 2 Electrical Characteristics Current Consumption VI = 13.5 V; VADJ/EN ≥ 2.0 V; VFB = VQ; -40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground (unless otherwise specified). Pos. Parameter Symbol Min. Typ. Max. 5.2.1 Quiescent Current Stand-by Mode Iq1 – 0 Current Consumption Iq2 – 5.2.2 Limit Values Unit Conditions 2 µA 120 150 µA – 7 15 mA – 1 3 mA VQ = 0 V; VADJ/EN ≤ 0.
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TLE4253 Electrical Characteristics Typical Performance Characteristics Tracking Regulator VADJ/EN = 5 V; VFB = VQ (unless otherwise noted) Current Consumption Iq2 vs. Junction Temperature Tj Current Consumption Iq vs. Output Current IQ Iq-IQ.vsd Iq-Tj.vsd I q [mA] I q [mA] VI = 13.5V IQ = 200 mA 10 V EN/ADJ = 5 V 10 VI = 6 V 1 1 VI > 9 V I Q = 200 µA 0.1 0.1 0.01 -40 -20 0 20 40 60 0.01 0.2 80 100 120 140 1 10 Tj [°C] Current Consumption Iq vs. Input VoltageVI 30 Iq-VI.
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TLE4253 Electrical Characteristics 5.3 Adjust / Enable Input In order to reduce the quiescent current to a minimum, the TLE4253 can be switched to stand-by mode by setting the adjust/enable input “ADJ/EN” to “low”. In case the pin “ADJ/EN is left open, an internal pull-down resistor keeps the voltage at the pin low and therefore ensures that the regulator is switched off. Table 3 Electrical Characteristics Adjust / Enable VI = 13.5 V; VADJ/EN ≥ 2.
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TLE4253 Application Information 6 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. The application circuits shown are simplified examples. The function must be verified in the real application. VBAT µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc.
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TLE4253 Application Information VBAT µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc. GND VDD I/O VREF R1ADJ 5 EN/ ADJ R2ADJ Q 1 VQ < VREF TLE 4253 G 8 FB I 4 GND 2, 3, 6, 7 Figure 4 Application circuit: Output voltage VQ lower than reference voltage VREF In order to obtain a lower output voltage VQ at the tracker output than the reference voltage VREF, a voltage divider according to Figure 4 has to be used.
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TLE4253 Application Information VBAT µC, e.g. C167 Main µC supply, e.g. TLE4271-2 I Q TLE4278 TLE4470 etc. GND VDD I/O VREF 5 EN/ ADJ Q TLE 4253 G 8 I FB GND VQ > VREF 1 4 R1FB R2FB 2, 3, 6, 7 Figure 5 Application circuit: Output voltage VQ higher than reference voltage VREF For output voltages higher than the reference voltage, the voltage divider has to be applied between the feedback and the output according to Figure 5.
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TLE4253 Package Outlines 7 Package Outlines 2) 0.41+0.1 -0.06 0.2 M B A B 8x e 0.19 +0.06 L 0.64 ±0.25 6 ±0.2 0.2 B 0.1 C 8 MAX. 1.27 4 -0.21) 1.75 MAX. 0.175 ±0.07 (1.45) 0.35 x 45˚ M C 8x A HLG05506 8 5 1 4 Reflow Soldering 5 -0.2 1) A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area Dimensions: e = 1.27 A = 5.69 L = 1.31 B = 0.
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TLE4253 Package Outlines 0.35 x 45˚ 1.27 0.41±0.09 2) 0.2 M 0.19 +0.06 0.08 C Seating Plane C A-B D 8x 0.64 ±0.25 D 0.2 6 ±0.2 8˚ MAX. C 0.1 C D 2x 1.7 MAX. Stand Off (1.45) 0.1+0 -0.1 3.9 ±0.11) M D 8x Bottom View 8 1 5 1 4 8 4 5 2.65 ±0.2 3 ±0.2 A B 4.9 ±0.11) 0.1 C A-B 2x Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Dambar protrusion shall be maximum 0.
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TLE4253 Revision History 8 Revision History Revision Date 1.2 Changes 2009-11-09 Updated Version Data Sheet, version TLE4253E in PG-DSO-8 exposed pad and all related description added: In “Overview” on Page 2 picture for package PG-DSO-8 updated In “Features” on Page 2 “package” replaced by “packages” In “Functional Description” on Page 2 “a small PG-DSO-8 package” replaced by “small PG-DSO-8 packages”; “The exposed pad (EP) package variant PG-DSO-8 exposed pad offers extremely low thermal resistance.
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Edition 2009-11-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.