Datasheet

ManualsBrandsINFINEON TECHNOLOGIES ManualsVoltage RegulatorsTLE4275D V33

5-V Low Drop Fixed Voltage Regulator

TLE 4275

Data Sheet 1 Rev. 1.7, 2007-02-19

Type Package

TLE 4275 PG-TO220-5-11 (RoHS compliant)

TLE 4275 D PG-TO252-5-11 (RoHS compliant)

TLE 4275 G PG-TO263-5-1 (RoHS compliant)

TLE 4275 S PG-TO220-5-12 (RoHS compliant)

P-TO220-5-11

PG-TO220-5-11

P-TO252-5-11

PG-TO252-11

P-TO263-5-1

PG-TO263-5-1

-TO220-5-12

PG-TO220-5-12

Features

• Output voltage 5 V ± 2%

• Very low current consumption

• Power-on and undervoltage reset

• Reset low down to

= 1 V

• Very low-drop voltage

• Short-circuit-proof

• Reverse polarity proof

• Suitable for use in automotive electronics

• ESD protection > 4 kV

• Green Product (RoHS compliant) version of TLE 4275

•

AEC qualified

Functional Description

The TLE 4275 is a monolithic integrated low-drop

voltage regulator in a 5-pin TO-package. An input

voltage up to 45 V is regulated to

Q,nom

= 5.0 V. The IC

is able to drive loads up to 450 mA and is short-circuit

proof. At overtemperature the TLE 4275 is turned off by

the incorporated temperature protection. A reset signal

is generated for an output voltage

Q,rt

of typ. 4.65 V.

The delay time can be programmed by the external

delay capacitor.

Summary of content (17 pages)

PAGE 1
5-V Low Drop Fixed Voltage Regulator TLE 4275 Features • • • • • • • • • • • Output voltage 5 V ± 2% Very low current consumption Power-on and undervoltage reset Reset low down to VQ = 1 V Very low-drop voltage Short-circuit-proof Reverse polarity proof Suitable for use in automotive electronics ESD protection > 4 kV Green Product (RoHS compliant) version of TLE 4275 AEC qualified P-TO220-5-11 PG-TO220-5-11 P-TO252-5-11 PG-TO252-11 Functional Description The TLE 4275 is a monolithic integrated low-d
PAGE 2
TLE 4275 Dimensioning Information on External Components The input capacitor CI is necessary for compensation of line influences. Using a resistor of approx. 1 Ω in series with CI, the oscillating of input inductivity and input capacitance can be damped. The output capacitor CQ is necessary for the stability of the regulation circuit. Stability is guaranteed at values CQ ≥ 22 µF and an ESR of ≤ 5 Ω within the operating temperature range.
PAGE 3
TLE 4275 PG-TO252-5-11 GND PG-TO220-5-11 1 PG-TO220-5-12 5 Ι RO D Q AEP02580 PG-TO263-5-1 Ι GND Q RO D IEP02527 Ι GND Q RO D AEP02756 Ι GND Q D RO IEP02528 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No. Symbol Function 1 I Input; block to ground directly at the IC by a ceramic capacitor.
PAGE 4
TLE 4275 Temperature Sensor I 1 5 Bandgap Reference D Saturation Control and Protection Circuit Q Buffer 4 Reset Generator 2 RO 3 AEB02425 Figure 2 Data Sheet Block Diagram 4 Rev. 1.
PAGE 5
TLE 4275 Table 2 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Test Condition Min. Max. VI II -42 45 V – – – – Internally limited VQ IQ -1.0 16 V – – – – Internally limited VRO IRO -0.3 25 V – –5 5 mA – VD ID -0.
PAGE 6
TLE 4275 Table 4 Characteristics VI = 13.5 V; -40 °C < Tj < 150 °C (unless otherwise specified) Parameter Symbol Limit Values Min. Typ. Max. Unit Measuring Condition Output Output voltage VQ 4.9 5.0 5.1 V 5 mA < IQ < 400 mA 6 V < VI < 28 V Output voltage VQ 4.9 5.0 5.
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TLE 4275 Table 4 Characteristics (cont’d) VI = 13.5 V; -40 °C < Tj < 150 °C (unless otherwise specified) Parameter Symbol Limit Values Unit Measuring Condition Min. Typ. Max. 4.5 4.65 4.8 V – Reset output low voltage VROL – 0.2 0.4 V Reset output leakage current IROH – 0 10 µA Rext ≥ 5 kΩ; VQ > 1 V VROH = 5 V Reset charging current ID,c VDU VDRL trd trr 3.0 5.5 9.0 µA VD = 1 V 1.5 1.8 2.2 V – 0.2 0.4 0.7 V – 10 16 22 ms – 0.
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TLE 4275 II I CI 1 CI 2 1000 µF 100 nF 1 5 IQ Q CQ 22 µF R ext 5 kΩ D VI ID, d ID, c VD CD 4 3 GND 2 RO IRO VQ VRO IGND 47 nF AES02472 Figure 3 Test Circuit VΙ t < t rr VQ V Q, rt d V Ι D,c = dt CD VD t V DU V DRL VRO t rr t rd t t Power-on-Reset Figure 4 Data Sheet Thermal Shutdown Voltage Dip at Input Undervoltage Secondary Spike Overload at Output AED03010 Reset Timing 8 Rev. 1.
PAGE 9
TLE 4275 Output Voltage VQ versus Temperature Tj VQ Output Current IQ versus Temperature Tj AED03029 5.2 V IQ 5.1 AED03034 1200 mA 1000 VI = 13.5 V 5.0 800 4.9 600 4.8 400 4.7 200 4.6 -40 0 40 80 0 -40 120 ˚C 160 0 40 80 Tj Tj Output Voltage VQ versus Temperature Tj VQ Output Voltage VQ versus Input Voltage VI AED03029 3.5 V 120 ˚C 160 AED01929 12 VQ 3.4 V 10 VI = 13.5 V 3.3 8 3.2 6 3.1 4 3.0 2.
PAGE 10
TLE 4275 Output Current IQ versus Input Voltage VI Current Consumption Iq versus Output Current IQ AED03030 1.2 IQ Ιq A AED03085 80 mA 70 1.0 60 0.8 50 T j = 125 ˚C 25 ˚C 40 0.6 30 0.4 VΙ = 13.5 V 20 0.2 10 0 0 10 20 30 0 40 V 50 0 100 200 300 400 VI mA 600 ΙQ Current Consumption Iq versus Output Current IQ Drop Voltage Vdr versus Output Current IQ AED03084 3 Ι q mA Vdr AED03031 800 mV 700 600 2 500 T j = 125 ˚C 25 ˚C 400 VΙ = 13.
PAGE 11
TLE 4275 Charge Current ID,c versus Temperature Tj AED03086 8 I D, c µA 7 I D, c 6 5 VI = 13.5 V VD = 1 V 4 3 2 1 0 -40 0 40 80 120 ˚C 160 Tj Delay Switching Threshold VDU, VDRL versus Temperature Tj AED03083 4.0 V V DU V DRL 3.5 3.0 2.5 VΙ = 13.5 V 2.0 V DU 1.5 1.0 0.5 V DRL 0 -40 0 40 80 120 ˚C 160 Tj Data Sheet 11 Rev. 1.
PAGE 12
TLE 4275 Package Outlines 10 ±0.2 A 9.8 ±0.15 4.4 0.05 3.7 ±0.3 10.2 ±0.3 8.6 ±0.3 C 9.25 ±0.2 1.27 ±0.1 2.8 ±0.2 1) 13.4 15.65 ±0.3 17±0.3 8.5 1) 3.7-0.15 0.5 ±0.1 0...0.15 2.4 0.8 ±0.1 1.7 1) 3.9 ±0.4 0.25 M A C 8.4 ±0.4 Typical All metal surfaces tin plated, except area of cut.
PAGE 13
TLE 4275 6.5 +0.15 -0.05 A 1) 2.3 +0.05 -0.10 B (5) 0.51 MIN. 0.15 MAX. per side 5 x 0.6 ±0.1 1.14 4.56 0.5 +0.08 -0.04 0.9 +0.20 -0.01 0...0.15 0.8 ±0.15 (4.24) 1 ±0.1 9.98 ±0.5 6.22 -0.2 5.7 MAX. 0.5 +0.08 -0.04 0.1 B 0.25 M A B 1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut.
PAGE 14
TLE 4275 4.4 10 ±0.2 1.27 ±0.1 A 8.5 1) B 0.05 2.4 0.1 2.7 ±0.3 4.7 ±0.5 7.55 1) 9.25 ±0.2 (15) 1±0.3 0...0.3 0...0.15 5 x 0.8 ±0.1 0.5 ±0.1 4 x 1.7 0.25 M A B 8˚ MAX. 1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut. 0.
PAGE 15
TLE 4275 10 ±0.2 A 9.8 ±0.15 B 1) 0...0.15 13 ±0.5 0.05 0.5 ±0.1 6x 0.8 ±0.1 1.7 9.25 ±0.2 1.27 ±0.1 11±0.5 C 1) 4.4 2.8 ±0.2 1) 13.4 15.65 ±0.3 17±0.3 8.5 3.7 -0.15 2.4 0.25 M A B C Typical All metal surfaces tin plated, except area of cut.
PAGE 16
TLE 4275 TLE 4275 Revision History: 2007-02-19 Previous Version: 1.6 Rev. 1.7 Page Subjects (major changes since last revision) general Removed all information related to the TLE4275v33 Product Proposal.
PAGE 17
Edition 2007-02-19 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2007. All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”).