Data Sheet, Rev. 2.1, Aug.
Edition 2007-08-08 Published by Infineon Technologies AG 81726 Munich, Germany © 2004 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.
LIN Transceiver TLE6258-2G Features • • • • • • • • • • Single-wire transceiver, suitable for LIN protocol Compatible to LIN specification 1.2, 1.3 and 2.0 Compatible to ISO 9141 functions Transmission rate up to 20 kBaud Very low current consumption in stand-by mode Wake-up from Bus Short circuit proof to ground and battery Overtemperature protection Green Product (RoHS compliant) AEC Qualified Description The single wire transceiver TLE6258-2G is a monolithic integrated circuit in a PG-DSO-8 package.
TLE6258-2G TL E6258- 2G R xD 1 8 N .C . EN H 2 7 VS V CC 3 6 Bus T xD 4 5 GN D AEP03406.VSD Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions Pin No.
TLE6258-2G TL E6258 -2G VS 7 3 VCC 30 kΩ 30 k Ω Bus 6 Output Stage M ode C ontrol 2 ENN D river T em p.Protection 4 T xD R eceiver 1 5 R xD GND AEB03405.VSD Figure 2 Data Sheet Functional Block Diagram 5 Rev. 2.
TLE6258-2G Application Information Start Up Power Up Normal Mode ENN VCC Low ON ENN Low Power-Up ENN High ENN High ENN Low VCC RxD Low 1) ON or High 3) Off Wake Up t > tWAKE Stand-by Mode ENN VCC High ON or Off 1) After wake-up via bus 3) After start up, VCC ON TOAEA03451_1.VSD Figure 3 State Diagram For fail safe reasons the TLE6258-2G has already a pull-up resistor of 30 kΩ implemented.
TLE6258-2G Table 2 Absolute Maximum Ratings Parameter Symbol Limit Values Unit Remarks 6 V – -0.3 40 V – -20 32 V – -20 40 V -0.3 VCC + V t<1s 0 V < VCC < 5.5 V Min. Max. -0.3 Voltages Supply voltage Battery supply voltage Bus input voltage Bus input voltage Logic voltages at EN, TxD, RxD VCC VS Vbus Vbus VI 0.3 Electrostatic discharge voltage at VS, Bus VESD -4 4 kV human body model (100 pF via 1.
TLE6258-2G Table 4 Electrical Characteristics 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Current Consumption Current consumption ICC – 0.4 0.7 mA recessive state; VTxD = VCC Current consumption IS – 0.5 1.0 mA recessive state; VTxD = VCC Current consumption ICC – 0.4 0.
TLE6258-2G Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. – 2.8 Unit Remark Max. Enable Not Input (pin ENN) HIGH level input voltage threshold VENN,off LOW level input voltage threshold VENN,on ENN input hysteresis VENN,hys RENN ENN pull-up resistance 0.
TLE6258-2G Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Bus Receiver Receiver threshold voltage, recessive to dominant edge Vbus,rd 0.44 × VS 0.48 × VS – V -8 V < Vbus < Vbus,dom Receiver threshold voltage, dominant to recessive edge Vbus,dr – 0.
TLE6258-2G Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Symbol Limit Values Min. Typ. Max. Unit Remark Dynamic Transceiver Characteristics 1) Falling edge slew rate Sbus(L) -3 -2.0 -1 V/µs 60% > Vbus > 40% 1 µs < (τ = RL × CBUS) < 5 µs; VCC = 5 V; VS = 13.
TLE6258-2G Table 4 Electrical Characteristics (cont’d) 4.5 V < VCC < 5.5 V; 6.0 V < VS < 27 V; RL = 500 Ω; VENN < VENN,ON; -40 °C < Tj < 125 °C; all voltages with respect to ground; positive current flowing into pin; unless otherwise specified. Parameter Wake-up delay time Delay time for mode change Symbol twake Limit Values Unit Remark Min. Typ. Max. 30 100 150 µs 170 µs 50 µs tsnorm Tj < 125 °C Tj < 150 °C 1) Bus load conditions concerning LIN spec 2.0 Cbus, Rbus = 1 nF, 1 kΩ / 6.
TLE6258-2G VS ENN 100 nF TxD 1 kΩ RxD 20 pF Bus CBus GND VCC 100 nF AEA03408.VSD Figure 4 Test Circuits VTxD VCC GND VBus td(L),T td(H),T t VS VBus,rd VBus,dr td(L),R td(H),R GND VRxD td(L),TR td(H),TR VCC GND t 0.7 x VCC 0.3 x VCC t AET03409.VSD Figure 5 Data Sheet Timing Diagram for Dynamic Characteristics 13 Rev. 2.
TLE6258-2G Application V Bat LIN Bus M aster Node TL E6258 -2G VS 100 nF EN N µP R xD 1 kΩ T xD Bus GN D VQ VI + 22 µF 100 nF V CC 100 nF 100 nF GN D 5V e. g. T LE 4278 + GN D 22 µF EC U 1 Slave N ode 100 nF TL E6258 -2G VS EN N µP R xD T xD Bus GN D VQ VI + 22 µF 100 nF V CC e. g. T LE 4278 GN D 100 nF 100 nF GN D 5V + 22 µF EC U X AEA03404.VSD Figure 6 Data Sheet Application Circuit 14 Rev. 2.
TLE6258-2G 0.1 2) 0.41+0.1 -0.06 0.2 8 5 1 4 5 -0.2 1) M 0.19 +0.06 C B 8 MAX. 1.27 0.35 x 45˚ 4 -0.2 1) 1.75 MAX. 0.175 ±0.07 (1.45) Package Outlines 0.64 ±0.25 6 ±0.2 A B 8x 0.2 M C 8x A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max.
TLE6258-2G Revision History Version Date Rev. 2.