Data Sheet, Rev. 1.1, Jan.
TLE 7241E Table of Contents Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 1.1 1.2 1.3 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dual Channel Constant Current Control Solenoid Driver 1 Overview 1.1 Features • • • • • • • • • TLE 7241E PG-DSO-20-27 Two Fully Independent Channels Integrated N-channel DMOS transistors Programmable Average Current with 10-bit resolution via SPI – Iavg range = 0 to 1000 mA (typical) Programmable Superimposed Dither – Programmable Frequency (41 Hz to 1 kHz typ) – Programmable Amplitude (12.
TLE 7241E Overview 1.2 • • Applications Variable force solenoids (e.g. automatic transmission solenoids) Constant current controlled solenoids like – Idle Speed Control – Exhaust Gas Recirculation – Valve control – Suspension Control 1.3 General Description The TLE 7241E is a dual channel constant current control solenoid driver with integrated DMOS power transistors.
TLE 7241E Overview Application Block Diagram Solenoid VBAT VBAT VDD BAT REF OUT1 DEFAULT TEST Logic VBAT NEG1 Channel 1 VSO PGND1 SI BAT REF SO OUT2 SPI SCK Channel 2 NEG2 CSB POS2 GND Figure 1 Data Sheet VBAT Solenoid POS1 PGND2 Basic Application Diagram 5 Rev. 1.
TLE 7241E Overview Detailed Block Diagram REF Vdd 6 14 BAT 16 Diagnostics & Protection * * * * * * Int Vref Vcal detect Over t em p Open load while on Open load while of f shorted load load short ed t o ground Overvolt age (Vpwr) Diff Amp Register bank Vref + - 4 POS1 3 NEG1 2 OUT1 1 PGND1 Vdd Status Vbat Fault type bit DEFAULT 7 TEST 13 VSO SPI Decoder VSO 9 SCK 8 Control Circuit Switching Hysteresis Error Cor Reg 200mv Error Cor Reg 400mv Error Cor Reg 600mv Error Cor Re
TLE 7241E Pin Configuration 2 Pin Configuration Pin Assignment 1 20 PGND2 OUT1 2 19 OUT2 NEG1 3 18 NEG2 POS1 4 17 POS2 N.C. 5 16 BAT VDD 6 15 GND DEFAULT 7 14 REF SCK 8 13 TEST CSB 9 12 SO 10 11 VSO SI TLE 7241E PGND1 EPGND Figure 3 PINOUT.
TLE 7241E Pin Configuration Pin Definitions and Functions (cont’d) Pin Pin Name Pin Description 8 SCK SPI Clock; Digital input pin. 3.3V and 5.0V logic compatible 9 CSB Chip Select Bar; Active low digital input pin. 3.3V and 5.0V logic compatible 10 SI Serial Data Input; 3.3V and 5.
TLE 7241E Maximum Ratings 3 Maximum Ratings Absolute Maximum Ratings1) Tj = -40 to 150 °C Pos. Parameter Symbol Limit Values Unit Notes Min. Max. -0.3 -0.3 -0.3 50 6.0 6.0 Vdc – Vdc Vdc POSx-NEGx -0.3 -0.3 -0.3 50 50 20 Vdc – Vdc Vdc Voltages M.1 Supply Voltage BAT VDD VSO M.2 Analog Input Voltage POSx NEGx M.3 Output Voltage OUTx -0.3 50 Vdc – M.4 Digital Input Voltage REF TEST SI SCK CSB DEFAULT -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 min. (6.0, VDD + 0.3) 6.0 6.0 6.0 min. (6.
TLE 7241E Maximum Ratings Absolute Maximum Ratings1) (cont’d) Tj = -40 to 150 °C Pos. Parameter Symbol Limit Values Unit Notes Min. Max. M.12 ESD HBM all pins EIA/JESD22-A 114B (1.5 K Ω, 100 pF) – -2 +2 kV – M.13 ESD MM all pins EIA/JESD22-A115A (0 Ω, 200 pF) – -200 200 V – 1) Not subject to production test, specified by design All voltages are with respect to PGND1 & 2. Positive current flows into the pin unless otherwise specified.
TLE 7241E Functional Range 4 Functional Range Functional Range Tj = -40 to 150 °C; VREF = 2.5V Pos. Parameter Symbol Limit Values Min. Max. Unit Remarks F.1 Voltage at BAT VBAT 9 18 V – F.2 Voltage at VDD VDD 4.75 5.25 V – F.3 Voltage at VSO VVSO 3.1 VDD + 0.3 V – or 5.25V F.4 Voltage at SI, SCK VIN1 -0.3 Voltage at CSB, DEFAULT, SO VIN2 -0.3 VDD + 0.3 V VSO + 0.3 V – F.5 F.6 Voltage at POS1, POS2, NEG1, NEG2, OUT1, OUT2 VOUT, VPOS, VNEG -0.3 50 V – F.
TLE 7241E Functional Range 1) Not subject to production test, specified by design. 2) Both channels on with 1W power dissipation per channel 3) Specified RthJA value is according to Jedec JESD51-2, -5, -7 at natural convection on FR4 2s2p board. The Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70mm Cu, 2 x 35 mm Cu). Where applicable a thermal via array under the exposed pad contacted the first inner layer. Data Sheet 12 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics 5 Functional Description and Electrical Characteristics Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25 °C and the given supply voltage. 5.1 Supply and Reference The device has incorporated a power-on reset circuit.
TLE 7241E Functional Description and Electrical Characteristics 5.2 Input/Output The DEFAULT pin is an active high input. A weak pull-up current (typical 15 μA) on this pin ensures a defined level when this pin is not connected (e.g. open pin). An active high signal on the DEFAULT pin sets the commanded current for both channels to 0 mA, and resets all programmable registers to their default values.
TLE 7241E Functional Description and Electrical Characteristics 5.3 Power Output The slew rate of the voltage on the pins OUT1 and OUT2 are programmable via the SPI interface. The fast settings are intended for fast switching solenoids (low inductance) to minimize power dissipation within the TLE 7241E, and to minimize DC current error due to overshooting the switch points.
TLE 7241E Functional Description and Electrical Characteristics 5.4 Protection and Control Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Max. Unit Test Conditions and Instructions 5.4.1 POS/NEG IBIAS POS/NEG -500 IBIAS – 500 μA DAC command =3FF POS=NEG=0V & POS=NEG=17V 5.4.
TLE 7241E Functional Description and Electrical Characteristics OVER-VOLTAGE FAULT V POSx - VNEGx on LS-Switch state off t < tov Vov Vov-ovhyst Vpwr 14 V Figure 4 Overvoltage Shutdown Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values 2) Min. Typ. 5.4.1.1 BAT Overvoltage OV Shutdown 30 35 40 Vdc Ramp up BAT until outputs Off 5.4.1.2 BAT Overvoltage OVHYST hysteresis – 1.
TLE 7241E Functional Description and Electrical Characteristics the driver will be turned off and the Overcurrent / Short to VBAT (VSHT) fault bit will be latched until the fault register is read via SPI. The driver will remain in the off condition for the short circuit refresh time (see table below, Item 5.4.2.2). After the refresh time, the driver will automatically turn on again. If the short condition is no longer present, the channel will operate normally.
TLE 7241E Functional Description and Electrical Characteristics SHORT TO Vbat FAULT - OCCURS & CLEARS WHILE ON VPOSx -VNEGx 15V Vpos 0V on LS-Switch state Load State off tss t < tss Short to Vbat Tref ok VSHTx fault state VSHTx latched fault state CSB G.C. cmd MOSI MISO G.C. cmd G.C. cmd G.C. response G.C. response G.C. response VSHT=0 VSHT=1 VSHT=1 VSHT=0 The Latched Fault State is sampled and stored in the SPI transmit register at the points marked with “ Figure 5 G.C. cmd G.C.
TLE 7241E Functional Description and Electrical Characteristics SHORT TO Vbat FAULT - OCCURS WHILE OFF THEN TURNED ON VP OSx - VNEGx Vpos 15V 0V LS-Switch state on off Tref Short to Load State Vbat ok tss VSHTx fault state VSHTx latched fault state CSB A.C. cmd Iav>50ma G.C. cmd MOSI A.C. G.C. response response G.C. response MISO EDG=0 VSHT=0 G.C. cmd G.C. cmd G.C. cmd VSHT=1 G.C. response G.C.
TLE 7241E Functional Description and Electrical Characteristics 5.4.3 Open Load / Short to Ground Detection The OLSG fault bit is set under the following conditions. Operating Condition #1 The average current command is > 50 mA (with 1 Ω sense resistor) and the low-side driver is ON (solenoid current is increasing).
TLE 7241E Functional Description and Electrical Characteristics (“Electrical Characteristics” on Page 23, Item 5.4.3.5). A pull-up current (“Electrical Characteristics” on Page 23, Item 5.4.3.2) will be activated between VDD and the POS pin when the Fault Typing bit = 1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Test Conditions and Instructions 5.4.3.1 POS Open detect IOL current 20 40 60 μA Fault typing bit = 0, Zero Current 5.4.3.2 POS Load short to ISG ground detect -60 -40 -20 μA Fault typing bit = 1, Zero Current, POS = NEG = 2 V tos(on) 5.4.3.
TLE 7241E Functional Description and Electrical Characteristics Diagnostics Timing Diagrams OPEN CIRCUIT / SHORT TO GROUND FAULT - OCCURS & CLEARS WHILE ON VPOS - VNEG on Output transistor state off open Load State tos(on) ok OL/SGx fault state t < tos (on) OL/SGx latched fault state CSB G.C. cmd MOSI G.C. cmd G.C. cmd G.C. cmd G.C. response G.C. response G.C. response OLSG=0 OLSG=0 OLSG=1 G.C. cmd G.C. response G.C.
TLE 7241E Functional Description and Electrical Characteristics OPEN CIRCUIT FAULT - OCCURS & CLEARS WHILE OFF 14V V POSx dVPOS/dt 2.5V t < tos (off) open Load State ok tos (off) OL/SGx fault state OL/SGx latched fault state CSB G.C. cmd G.C. cmd G.C. cmd MOSI G.C. response G.C. response G.C. response OLSG=1 OLSG=0 MISO OLSG=0 The Latched Fault State is sampled and stored in the SPI transmit register at the points marked with “ Figure 10 “.
TLE 7241E Functional Description and Electrical Characteristics OPEN CIRCUIT FAULT - OCCURS WHILE OFF THEN TURNED ON 14V VPOSx 2.5V open Load State ok tos (off) tos(on) = 12ms OL/SGx fault state OL/SGx latched fault state CSB G. C. cmd G. C. cmd A.C. cmd Iav>50ma G. C. cmd MOSI G. C. response G.C. response A.C. response OLSG=0 OLSG=1 EDG=1 G. C.
TLE 7241E Functional Description and Electrical Characteristics OPEN CIRCUIT FAULT - OCCURS WHILE OFF THEN OPEN LOAD / SHORT TO GROUND TEST IS PERFORMED 14V V POSx dV POS/dt 2.5V open Load State ok tos(off) tos (off) tos(off) OL/SGx fault state OL/SGx latched fault state CSB MOSI MISO G.C. cmd G.C. response G.C. response OLSG=0 OLSG=1 The Latched Fault State is sampled and stored in the SPI transmit register at the points marked with “ Figure 12 G.C. cmd FT=1 G.C. cmd FT=1 G.C. cmd G.C.
TLE 7241E Functional Description and Electrical Characteristics SHORT TO GROUND FAULT - OCCURS & CLEARS WHILE OFF 14V VPOSx 2.5V t < tos (off) Short to GND Load State ok tos(off) tos(off) OL/SGx fault state OL/SGx latched fault state CSB MOSI G.C. cmd G.C. cmd FT=1 G.C. cmd G.C. cmd FT=1 G.C. cmd FT=1 G.C. cmd G.C. cmd G.C. response G.C. response G.C. G.C. G.C. response response response G.C. G.C.
TLE 7241E Functional Description and Electrical Characteristics ^ OVER-TEMPERATURE FAULT VP OSx - VNEGx on LS-Switchx state off OT shutdown Sensor x temp OT shutdown OT hyst OTMPx fault state OTMPx latched fault state CSB G.C. cmd G.C. cmd G.C. cmd G.C. cmd MOSI MISO G.C. response G.C. response G.C. response G.C. response OTMP=0 OTMP=1 OTMP=1 OTMP=0 The Latched Fault State is sampled and stored in the SPI transmit register at the points marked with “ Figure 14 “.
TLE 7241E Functional Description and Electrical Characteristics 5.5 Current Control 5.5.1 Hysteretic Current Control The TLE 7241E device uses a hysteretic control method to regulate the solenoid current. The output transistor is toggled on and off based on the measured value of the solenoid current. The solenoid current is measured at the pins POSx and NEGx which are connected to an external current sense resistor.
TLE 7241E Functional Description and Electrical Characteristics Note that the switching frequency and duty cycle of the output transistor are not directly controlled by the TLE 7241E device and are dependent on the characteristics of the solenoid (inductance, resistance, etc.) and the solenoid supply voltage. Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter 3) Symbol Limit Values Min. Typ. Unit Test Conditions and Instructions Max. 2) 5.5.1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Min. Typ. Unit Test Conditions and Instructions Max. 5.5.1.7 OUTx4)5) dVOUT = 1000 mV Iavg register = 340H dVOUT1000 -3% 1000 3% mV Output current IOUT = 1000 mA with Rsense = 1.0 Ω REF = 2.5V 5.5.1.8 OUTx3)5) Switching hysteresis 40 Sw Hyst. register = 0 DAC counts = ±17 dVhyst40 29.6 39.6 49.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Min. Typ. Unit Test Conditions and Instructions Max. 5.5.1.11 OUTx3)5) Switching hysteresis 70 Sw Hyst. register = 3 DAC counts = ±29 dVhyst70 59.7 69.7 79.7 mVpp 70 mV programmed setting Input Command > 200 mV REF = 2.5V 5.5.1.12 OUTx3)5) Switching hysteresis 80 Sw Hyst. register = 4 DAC counts = ±33 dVhyst80 70.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Min. Typ. Unit Test Conditions and Instructions Max. 5.5.1.14 OUTx3)5) Switching hysteresis 100 Sw Hyst. register = 6 DAC counts = ±42 dVhyst100 88.7 99.7 109.7 mVpp 100 mV programmed setting Input Command > 200 mV REF = 2.5V 5.5.1.15 OUTx3)5) Switching hysteresis 110 Sw Hyst.
TLE 7241E Functional Description and Electrical Characteristics Figure 16 Data Sheet Blanking Time (output transistor turning off) 35 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics Figure 17 Data Sheet Blanking Time (output transistor turning on) 36 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics 5.5.2 Dither Control and Operation The dither waveform is generated digitally within the TLE 7241E by periodically adding or subtracting from the average current command register contents. Figure 18 is an illustration of the Dither Waveform. Dither Amplitude Dither Period Figure 18 Dither Waveform The Dither Frequency can be programmed over a range of 41 Hz to 1 kHz. The Dither Amplitude can be programmed over a range from 12.
TLE 7241E Functional Description and Electrical Characteristics Figure 19 Enhanced Dither Waveform When the enhanced dither bit is selected, the dither period will only be extended if the lower switch threshold is not crossed during the entire negative slope portion of the dither waveform. Example see Figure 20.
TLE 7241E Functional Description and Electrical Characteristics Figure 20 Enhanced Dither Waveform The extension of the dither period will be terminated when the lower switch threshold is crossed or when the extension time has exceeded the enhanced dither time out period (minimum 15 ms) - see Figure 21. Data Sheet 39 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics Enhanced Dither Time Out Figure 21 Data Sheet Enhanced Dither Time-out 40 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Min. Typ. Max. Unit Test Conditions and Instructions 15 – 25 ms – OUTx Dither3)4) IDAP-P Amplitude Reg = 04H 40.5 50 60.5 mVpp 50 mV setting programmed REF = 2.5V 5.5.2.3 OUTx Dither3)4) IDAP-P Amplitude Reg = 08H 90.9 101 110.9 mVpp 100 mV setting programmed REF = 2.5V 5.5.2.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Max. Unit Test Conditions and Instructions 5.5.2.12 OUTx Dither fdither Frequency Reg = 15H -15% 250 +15% Hz 250 Hz setting programmed3) 5.5.2.13 OUTx Dither fdither Frequency Reg = 11H -15% 308 +15% Hz 300 Hz setting programmed3) 5.5.2.
TLE 7241E Functional Description and Electrical Characteristics 5.5.3 Input Command Out of Range / Dither Clipping If an average current command between 000H and 029H inclusive (0 mA and 50 mA with a 1 Ω sense resistor) is received, then the average current will be set to 000 (channel disabled) and the COR (command out of range) error bit will be set. The average current set point verification reported in the MISO word, however, will be the actual average current command, not 000H.
TLE 7241E Functional Description and Electrical Characteristics Figure 22 5.5.4 Symmetrical Dither Clipping Error Correction Registers / Average Switch Threshold Trimming The average switch threshold of each channel is trimmed at wafer test under the following operating conditions: Tamb = 25 °C, VBAT = 14 V, Vcc = 5.0 V, VREF = 2.5 V, average current command = 299H (800 mA with 1 Ω sense resistor), dither = off, hysteresis = 80 mVpp. The TLE 7241E includes 5 error correction registers for each channel.
TLE 7241E Functional Description and Electrical Characteristics Error Correction Register # Corresponding Average Current Register Setting (Hex) Corresponding Ideal Average Current with a 1 Ω ext. Sense Resistor 0 0A6 200 mA 1 14D 400 mA 2 1F3 600 mA 3 29A 800 mA 4 340 1000 mA For example: • • • • Measured average switch threshold at 0A6H during Infineon production test = 207 mV Ideal average switch threshold at 0A6H = 199.6 mV Error Correction = -7.4 mV / (1.
TLE 7241E Functional Description and Electrical Characteristics 5.6 SPI Command and Diagnosis Structure 5.6.1 SPI Signal Description The SPI serial interface has the following features: • • • • Full duplex, 4-wire synchronous communication Slave mode operation only Fixed SCK polarity and phase requirements Fixed 16-bit command word SCK operation up to 5.0 MHz (the maximum clock frequency may be limited to a value less than 5.
TLE 7241E Functional Description and Electrical Characteristics Figure 23 Data Sheet SPI Timing Diagram 47 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics 1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Min. Typ. 5.6.1.1 CSB Input Bias ICSB Current ISI 5.6.1.2 SI Input Pulldown Current 5.6.1.3 SCK Input Pull- ISCK down Current 5.6.1.4 SO Tri-state Leakage Current 5.6.1.5 SI, SCK, CSB, CIN DEFAULT Input Capacitance ISOT -25 -10 2) Max.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Max. Unit Test Conditions and Instructions 5.6.1.10 SO, CSB SO Pin Enable/ Disable Tsoen, Tsodis – – 80 ns CSB = 2.0 V to SO = 0.8 V/2.0 V, 10K ext. SO pull-up (see Figure 23) - enable CSB = 0.8 V to SO hi-Z, 10K ext. SO pull-up (see Figure 23) - disable 5.6.1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Max. Unit Test Conditions and Instructions 5.6.1.16 SI, CSB, SCK Serial Inputs Rise/Fall Time Trsi/Tfsi – – 25 ns 3) 5.6.1.17 CSB, SCK CSB Falling Edge to SCK Rising Edge Tlead 100 – – ns CSB = 0.8 V to SCK = 0.8 V (see Figure 23) 5.6.1.
TLE 7241E Functional Description and Electrical Characteristics Electrical Characteristics (cont’d)1) Tj = -40 to 150 °C; VBAT = 9 V to 18 V; VDD = 4.75 V to 5.25 V Pos. Parameter Symbol Limit Values Min. Typ. 2) Max. Unit Test Conditions and Instructions 5.6.1.23 SCK Number of SCK pulses while CSB low (n is a positive integer) nSCK 16 n × 16 – Pulses – 5.6.1.24 CSB3) MISO shift register load delay time tdly – 1.7 μs CSB = 2.
TLE 7241E Functional Description and Electrical Characteristics 5.6.
TLE 7241E Functional Description and Electrical Characteristics MISO • • • • B12 Diagnostic Error: = 1 if OL/SG = 1 or VSHT = 1 or OTMP = 1 (channel specific) B11 Command out of Range: = 1 if the average current set point + the hysteresis setting result in a switch point > 1.23 V or < 0.03 V B10 Dither Clipping: = 1 if the dither setting, average current set point, and hysteresis setting result in a switch point > 1.23 V or < 0.
TLE 7241E Functional Description and Electrical Characteristics Table 2 Average Output Current Key (typical) - Partial Table (cont’d) COR Hex d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 Average Switch Point [mV] Load Current with 1 Ω Sense Resistor [mA] Load Current with 0.68 Ω Sense Resistor [mA] 0 340 1 1 0 1 0 0 0 0 0 0 999.38 999.38 1469.67 1) 3D3 1 1 1 1 0 1 0 0 1 1 1175.95 1175.95 1729.33 1) 3D4 1 1 1 1 0 1 0 1 0 0 1177.15 1177.15 1731.
TLE 7241E Functional Description and Electrical Characteristics Figure 26 B9 DA4 DA4 DA3 DA3 DA2 DA2 B6 B5 B4 B3 DA1 DA1 DA0 DA0 DF6 DF6 DF5 DF5 DF4 DF4 DF3 DF3 B2 B1 B0 DF2 DF2 DF1 DF1 DF0 DF0 Dither Frequency ED ED B7 Dither Amplitude 1 1 B8 Dither Frequency B10 Dither Amplitude B11 Enhanced Dither B12 Enhanced Dither 0 0 Dither Configuration CH CH Channel MOSI MISO B13 Dither Configuration B14 Channel B15 Dither Programming MOSI • • • B12 Enhanced Dither: Ena
TLE 7241E Functional Description and Electrical Characteristics Figure 27 Data Sheet Start of Dither Cycle 56 Rev. 1.
TLE 7241E Functional Description and Electrical Characteristics Table 3 Ideal Dither Amplitude Key (typical) Hex DA4 DA3 DA2 DA1 DA0 Dither Dither Amplitude Amplitude with [mVpp] 1 Ω sense resistor [mApp] Dither Amplitude with 0.68 Ω sense resistor [mApp] 00 0 0 0 0 0 0.0 0.00 0.00 01 0 0 0 0 1 12.6 12.6 18.5 02 0 0 0 1 0 25.2 25.2 37.1 03 0 0 0 1 1 37.8 37.8 55.6 04 0 0 1 0 0 50.5 50.45 74.19 05 0 0 1 0 1 63.1 63.06 92.74 06 0 0 1 1 0 75.
TLE 7241E Functional Description and Electrical Characteristics Table 3 Ideal Dither Amplitude Key (typical) Hex DA4 DA3 DA2 DA1 DA0 Dither Dither Amplitude Amplitude with [mVpp] 1 Ω sense resistor [mApp] Dither Amplitude with 0.68 Ω sense resistor [mApp] 1C 1 1 1 0 0 353.2 353.15 519.34 1D 1 1 1 0 1 365.8 365.77 537.89 1E 1 1 1 1 0 378.4 378.38 556.44 1F 1 1 1 1 1 391.0 390.99 574.99 register value × 10.
TLE 7241E Functional Description and Electrical Characteristics Table 4 Ideal Dither Frequency Key (typical)- Partial Table (cont’d) Hex DF6 DF5 DF4 DF3 DF2 DF1 DF0 Dither Frequency 10 0 0 1 0 0 0 0 327.4 Hz 11 0 0 1 0 0 0 1 308.1 Hz 12 0 0 1 0 0 1 0 291.0 Hz 13 0 0 1 0 0 1 1 275.7 Hz 14 0 0 1 0 1 0 0 261.9 Hz 15 0 0 1 0 1 0 1 249.4 Hz 16 0 0 1 0 1 1 0 238.1 Hz 17 0 0 1 0 1 1 1 227.7 Hz 18 0 0 1 1 0 0 0 218.
TLE 7241E Functional Description and Electrical Characteristics Table 4 Ideal Dither Frequency Key (typical)- Partial Table (cont’d) Hex DF6 DF5 DF4 DF3 DF2 DF1 DF0 Dither Frequency 2E 0 1 0 1 1 1 0 113.9 Hz 2F 0 1 0 1 1 1 1 111.4 Hz 30 0 1 1 0 0 0 0 109.1 Hz 31 0 1 1 0 0 0 1 106.9 Hz 32 0 1 1 0 0 1 0 104.8 Hz 33 0 1 1 0 0 1 1 102.7 Hz 34 0 1 1 0 1 0 0 100.7 Hz 35 0 1 1 0 1 0 1 98.8 Hz 36 0 1 1 0 1 1 0 97.
TLE 7241E Functional Description and Electrical Characteristics Table 4 Ideal Dither Frequency Key (typical)- Partial Table (cont’d) Hex DF6 DF5 DF4 DF3 DF2 DF1 DF0 Dither Frequency 4C 1 0 0 1 1 0 0 68.9 Hz 4D 1 0 0 1 1 0 1 68.0 Hz 4E 1 0 0 1 1 1 0 67.2 Hz 4F 1 0 0 1 1 1 1 66.3 Hz 50 1 0 1 0 0 0 0 65.5 Hz 51 1 0 1 0 0 0 1 64.7 Hz 52 1 0 1 0 0 1 0 63.9 Hz 53 1 0 1 0 0 1 1 63.1 Hz 54 1 0 1 0 1 0 0 62.
TLE 7241E Functional Description and Electrical Characteristics Table 4 Ideal Dither Frequency Key (typical)- Partial Table (cont’d) Hex DF6 DF5 DF4 DF3 DF2 DF1 DF0 Dither Frequency 6A 1 1 0 1 0 1 0 49.4 Hz 6B 1 1 0 1 0 1 1 49.0 Hz 6C 1 1 0 1 1 0 0 48.5 Hz 6D 1 1 0 1 1 0 1 48.1 Hz 6E 1 1 0 1 1 1 0 47.6 Hz 6F 1 1 0 1 1 1 1 47.2 Hz 70 1 1 1 0 0 0 0 46.8 Hz 71 1 1 1 0 0 0 1 46.4 Hz 72 1 1 1 0 0 1 0 45.
TLE 7241E Figure 28 B7 B6 B5 X 0 X 0 X 0 X REF FT FT B4 Over Temperature X X X OL/SG VSHT OTMP Short to Vpwr 0 0 B3 B2 SR0 SR0 SW2 SW2 Slew Rate SR1 SR1 B1 B0 Switching Hysteresis B8 SW1 SW1 SW0 SW0 Switching Hysteresis B9 Slew Rate B10 Fault Typing Current Source B11 Fault Typing Current Source B12 Open Load or Short to GND 1 1 General Configuration CH CH Channel MOSI MISO B13 General Configuration B14 Channel B15 Ext./Int. Reference Volt.
TLE 7241E Functional Description and Electrical Characteristics Table 5 Slew Rate Control Key SR1 SR0 Tf/Tr (4 V - 10 V) Slew Rate 0 0 0.5 μs 12 V/μs 0 1 1 μs 6 V/μs 1 0 2 μs 3 V/μs 1 1 5 μs 1.
TLE 7241E Functional Description and Electrical Characteristics MISO • • • B12 - 11 Command Extension: Always 00 B10 - B8 RID0-2: Register ID of the register contents in B7 - B0 B7 - B0 RV: Register contents Table 7 Error Register Values per Channel RID2 RID1 RID0 Register Name 0 0 0 Error Correction - 200 mV 0 0 1 Error Correction - 400 mV 0 1 0 Error Correction - 600 mV 0 1 1 Error Correction - 800 mV 1 0 0 Error Correction - 1000 mV 1 0 1 Chip Revision Code 1 1 0 00H 1
TLE 7241E Application 6 Application VPWR (4) Rbat (2) 2.5V ref Cref +5V VPWR/ RECIRC Cbat Cvdd VDD BAT REF Cout1(3) +5V or 3.3V OUT1 Rsns1 SOL1 Csol1 NEG1 VSO Cso POS1 Rso (5) Cng1 (3) Cps1 (3) PGND1 SO μController Tri-Core TC17XX Rdft (1). TLE7241 DEFAULT OUT2 SI Cout2 (3) Rsns2 NEG2 SCK POS2 CSB Cng2 (3) SOL2 Csol2 Cps2 (3) PGND2 TEST Figure 30 VPWR/ RECIRC GND Application Circuit Note: This is a very simplified example of an application circuit.
TLE 7241E Application 6.1 • • • • • • • • • • Layout Notes The POS pin should be connected directly to the external sense resistor with a dedicated trace. The NEG pin should be connected directly to the external sense resistor with a dedicated trace. The POS pin trace should be routed near the NEG pin trace and both traces should not be routed near noise inducing signal lines and/or components (SPI clock signals, switching power supply inductors, etc.).
TLE 7241E Package Outlines Package Outlines 1) 1.27 0.7 ±0.2 0.4 ±0.08 2) 0.25 M A 11 10.3 ±0.3 D Bottom View Ejector Mark Ejector Mark 11 20 Exposed Diepad 4.6 20 0.1 C 20x C A-B C D 20x 8° MAX. 7.6 -0.2 0.23 +0.09 0.35 x 45° 2.6 MAX. 0...0.10 2.45 -0.2 7 Index Marking 10 1 10 B 5.2 1 Index Marking 12.8 -0.2 1) 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max.
TLE 7241E Revision History 8 Revision History Version Date Rev. 1.1 2009-01-19 Page 68: Updated Package drawing (Stand-off) Page 69-70: added Revision History, updated Legal Disclaimer Data Sheet Changes 69 Rev. 1.
Edition 2009-01-19 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.
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