Datasheet
PROFET
®
ITS711L1
Infineon Technologies AG 3 2006-Mar-23
Maximum Ratings at T
j
= 25°C unless otherwise specified
Parameter Symbol Values Unit
Supply voltage (overvoltage protection see page 4) V
bb
43 V
Supply voltage for full short circuit protection
T
j,start
= -40 ...+150°C
V
bb
34 V
Load current (Short-circuit current, see page 5) I
L
self-limited A
Load dump protection
2)
V
LoadDump
= U
A
+ V
s
, U
A
= 13.5 V
R
I
3)
= 2 Ω, t
d
= 200 ms; IN = low or high,
each channel loaded with R
L
= 7.1 Ω,
V
Load
dump
4
)
60 V
Junction temperature
Operating temperature range
Storage temperature range
T
j
T
a
T
stg
+150
-30 ... +85
-40 … +105
°C
Power dissipation (DC)
5
T
a
= 25°C:
(all channels active)
T
a
= 85°C:
P
tot
3.6
1.9
W
Inductive load switch-off energy dissipation, single pulse
V
bb
= 12V, T
j,start
= 150°C
5)
,
I
L
= 1.9 A, Z
L
= 66 mH, 0 Ω one channel:
I
L
= 2.8 A, Z
L
= 66 mH, 0 Ω two parallel channels:
I
L
= 4.4 A, Z
L
= 66 mH, 0 Ω four parallel channels:
see diagrams on page 9 and page 10
E
AS
150
320
800
mJ
Electrostatic discharge capability (ESD)
(Human Body Model)
V
ESD
1.0 kV
Input voltage (DC) V
IN
-10 ... +16 V
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
I
IN
I
ST
±2.0
±5.0
mA
Thermal resistance
junction - soldering point
5),6)
each channel:
R
thjs
16 K/W
junction - ambient
5)
one channel active:
all channels active:
R
thja
44
35
2)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for input
protection is integrated.
3)
R
I
= internal resistance of the load dump test pulse generator
4)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
5)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70µm thick) copper area for V
bb
connection. PCB is vertical without blown air. See page 15
6)
Soldering point: upper side of solder edge of device pin 15. See page 15