Datasheet

ManualsBrandsInfineon ManualsDriversMotor driver P.TO-263-7-1

Data Sheet 1 2001-06-19

built using the Infineon multi-technology process SPT

which allows bipolar and CMOS

control circuitry plus DMOS power devices to exist on the same monolithic structure.

Operation modes forward (cw), reverse (ccw), brake and high impedance are invoked

from just two control pins with TTL/CMOS compatible levels. The combination of an

extremely low

DS ON

and the use of a power IC package with low thermal resistance and

high thermal capacity helps to minimize system power dissipation. A blocking capacitor

at the supply voltage is the only external circuitry due to the integrated freewheeling

diodes.

1Overview

1.1 Features

• Delivers up to 5 A continuous 6 A peak current

• Optimized for DC motor management applications

• Operates at supply voltages up to 40 V

•Very low

DS ON

; typ. 200 mΩ @25°C per switch

• Output full short circuit protected

• Overtemperature protection with hysteresis

and diagnosis

• Short circuit and open load diagnosis

with open drain error flag

• Undervoltage lockout

• CMOS/TTL compatible inputs with hysteresis

• No crossover current

• Internal freewheeling diodes

• Wide temperature range;

− 40 °C < T

< 150 °C

Description

The TLE 5205-2 is an integrated power H-bridge with

DMOS output stages for driving DC-Motors. The part is

Type Ordering Code Package

TLE 5205-2 Q67000-A9283 P-TO220-7-11

TLE 5205-2GP Q67006-A9237 P-DSO-20-12

TLE 5205-2G Q67006-A9325 P-TO263-7-1

TLE 5205-2S Q67000-A9324 P-TO220-7-12

5-A H-Bridge for DC-Motor Applications TLE 5205-2

P-TO220-7-11

P-DSO-20-12

P-TO263-7-1

P-TO220-7-12

Summary of content (23 pages)

PAGE 1
5-A H-Bridge for DC-Motor Applications 1 Overview 1.1 Features • • • • • • • • • • • • Delivers up to 5 A continuous 6 A peak current Optimized for DC motor management applications Operates at supply voltages up to 40 V Very low RDS ON; typ.
PAGE 2
TLE 5205-2 Overview 1.2 Pin Configuration (top view) TLE 5205-2 1 2 3 4 5 TLE 5205-2GP 6 7 GND N.C. N.C. N.C. N.C. VS Q1 EF IN1 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GND N.C. N.C. N.C. N.C. VS Q2 N.C.
PAGE 3
TLE 5205-2 Overview 1.3 Pin Definitions and Functions Pin No. P-TO220 Pin No. P-DSO Symbol Function 1 7 OUT1 Output of Channel 1; Short-circuit protected; integrated freewheeling diodes for inductive loads.
PAGE 4
TLE 5205-2 Overview 1.
PAGE 5
TLE 5205-2 Overview 1.5 Circuit Description Input Circuit The control inputs consist of TTL/CMOS-compatible schmitt-triggers with hysteresis. Buffer amplifiers are driven by this stages. Output Stages The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs against short-circuit to ground and to the supply voltage. Positive and negative voltage spikes, which occur when switching inductive loads, are limited by integrated freewheeling diodes.
PAGE 6
TLE 5205-2 Overview 1.7 Monitoring Functions Undervoltage lockout (UVLO): When VS reaches the switch on voltage VS ON the IC becomes active with a hysteresis. All output transistors are switched off if the supply voltage VS drops below the switch off value VS OFF. 1.8 Protective Function Various errors like short-circuit to + VS, ground or across the load are detected. All faults result in turn-OFF of the output stages after a delay of 50 µs and setting of the error flag EF to ground.
PAGE 7
TLE 5205-2 Overview V EH = Pull UP 10 k Ω EF = Pull Down 10 k Ω V EL & 50 µ s RS FF AES02395 Figure 3 Data Sheet Simplified Schematic for Open Load Detection 7 2001-06-19
PAGE 8
TLE 5205-2 Diagnosis 2 Diagnosis Various errors as listed in the table “Diagnosis” are detected. Short circuits and overload result in turning off the output stages after a delay tdSD and setting the error flag simultaneously [EF = L]. Changing the inputs to a state where the fault is not detectable resets the error flag (input toggling) with the exception of short circuit from OUT1 to OUT2 (load short circuit).
PAGE 9
TLE 5205-2 Electrical Characteristics 3 Electrical Characteristics 3.1 Absolute Maximum Ratings – 40 °C < Tj < 150 °C Parameter Symbol Limit Values Unit Remarks min. max. – 0.3 40 V – –1 40 V – 0.3 7 V t < 0.5 s; IS > – 5 A 0 V < VS < 40 V – 0.3 7 V – Voltages Supply voltage Logic input voltage Diagnostics output voltage VS VIN1, 2 VEF Currents of DMOS-Transistors and Freewheeling Diodes Output current (cont.
PAGE 10
TLE 5205-2 Electrical Characteristics 3.2 Operating Range Parameter Symbol Limit Values min. Supply voltage VS 3.3 After VS rising above VUV ON – 0.3 Outputs in tristate condition – 0.3 7 V – – 40 150 °C – Supply voltage decreasing Junction temperature V VUV ON V VUV OFF V – 0.3 VIN1, 2 Tj Remarks max.
PAGE 11
TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. Unit Test Condition typ. max.
PAGE 12
TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. max. Unit Test Condition Short Circuit Current Limitation Source current – ISCH – – 20 A Sink current ISCL – – 15 A t < tdSD t < tdSD Pull up resistor RUP 5 10 20 kΩ – Pull down resistor RDOWN 5 10 20 kΩ – Switching threshold H VEH 2 2.
PAGE 13
TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values min. typ. Unit Test Condition max.
PAGE 14
TLE 5205-2 Electrical Characteristics 3.3 Electrical Characteristics (cont’d) 6 V < VS < 18 V; IN1 = IN2 = HIGH IOUT1, 2 = 0 A (No load); – 40 °C < Tj < 150 °C; unless otherwise specified Parameter Symbol Limit Values Unit Test Condition min. typ. max. VEFL IEFL – 0.25 0.
PAGE 15
TLE 5205-2 Electrical Characteristics Ι FU ; Ι S Ι EF Ι IN1 V EF Ι IN2 V IN1 6 2 3 5 EF VS IN1 TLE 5205-2 IN2 V IN2 4700 µ F 63 V 470 nF OUT1 OUT2 1 Ι OUT1 7 Ι OUT2 R Load VS GND V OUT1 V OUT2 4 Ι FL AES02396 Figure 4 IOUT Data Sheet Test Circuit Overcurrent Short Circuit Open Circuit ISD ISC IOC 15 2001-06-19
PAGE 16
TLE 5205-2 Electrical Characteristics VIN V 5 t r = t f <_ 100 ns 50% t 0 Ι OUT Source t dONH A 3 t dOFFH 80% 50% 20% 0 Ι OUT Sink A 3 80% 50% 20% t ONH t OFFH t OFFL t ONL 80% 50% 20% 0 t 80% 50% 20% t dOFFL t t dONL AET01994 Figure 5 Switching Time Definitions +5V +V S 2 kΩ 2 µP 100 µF 6 3 5 EF VS IN1 TLE 5205-2 IN2 OUT1 1 100 nF OUT2 7 M ΙN =3A Ι BL = 6 A GND 4 AES02397 Figure 6 Data Sheet Application Circuit 16 2001-06-19
PAGE 17
TLE 5205-2 Electrical Characteristics IN1, 2 Ι SCH Ι SDH Ι OUT1, 2 R Short x Ι SCH VOUT1, 2 t dSD V FL EF AED01997 Figure 7 Timing Diagram for Output Shorted to Ground IN1, 2 Ι SCL Ι SDL Ι OUT1, 2 VOUT1, 2 VS R Short x Ι SCL V FU t dSD EF AED01998 Figure 8 Data Sheet Timing Diagram for Output Shorted to VS 17 2001-06-19
PAGE 18
TLE 5205-2 Electrical Characteristics Diagrams Quiescent Current IS (Active) versus Junction Temperature Tj AED02398 7 ΙS Static Drain-Source ON-Resistance versus Junction Temperature Tj AED02399 0.6 mA R ON 6 0.5 5 0.4 Low Side Transistor 0.3 V S = 18 V 4 0.2 3 VS =6V 2 1 -50 0 50 100 High Side Transistor 0.
PAGE 19
TLE 5205-2 Electrical Characteristics Overcurrent Shutdown Threshold ISD versus Junction Temperature Tj Switching Threshold VEH, VEH versus Junction Temperature Tj AED02402 12 AED02404 3.0 Ι SD V EH ,V EL 2.8 10 Low Side Transistor 8 2.6 V EH High Side Transistor 6 2.4 4 2.2 2 2.0 0 -50 0 50 100 1.8 -50 C 150 Tj V EL 0 50 100 C 150 Tj Error-Flag Saturation Output Voltage VEF versus Junction Temperature Tj AED02403 0.6 V EF 0.5 0.4 0.3 0.2 0.
PAGE 20
TLE 5205-2 Package Outlines 4 Package Outlines P-TO220-7-11 (Plastic Transistor Single Outline Package) 10 ±0.2 A 9.9 ±0.2 1.27 ±0.1 C 7x 0.6 ±0.1 1.6 ±0.3 3.9 ±0.4 0.25 M A C Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. 20 8.4 ±0.4 GPT09083 6x 1.27 Data Sheet 0.5 ±0.1 2.4 0...0.15 1) 3.7 ±0.3 10.2 ±0.3 8.6 ±0.3 0.05 9.25 ±0.
PAGE 21
TLE 5205-2 Package Outlines B 5˚ ±3˚ -0.02 0.25 +0.0 7 1.3 1.2 -0.3 11 ±0.15 1) 2.8 3.5 max. 0 +0.15 3.25 ±0.1 P-DSO-20-12 (Plastic Dual Small Outline Package) 15.74 ±0.1 1.27 0.4 Index Marking 0.1 6.3 +0.13 0.25 M 20 11 1 1 x 45˚ 10 A 20x 14.2 ±0.3 Heatsink 0.95 ±0.15 0.25 M B 15.9 ±0.15 1) A 1) Does not include plastic or metal protrusion of 0.15 max. per side Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”.
PAGE 22
TLE 5205-2 Package Outlines P-TO263-7-1 Option E3180 (Plastic Transistor Single Outline Package) 4.4 10 ±0.2 1.27 ±0.1 0...0.3 B 0.05 2.4 0.1 4.7 ±0.5 2.7 ±0.3 7.551) 1±0.3 9.25 ±0.2 (15) A 8.5 1) 0...0.15 7x0.6 ±0.1 6x 1.27 0.5 ±0.1 0.25 M A B 8˚ max. 1) Typical Metal surface min. X=7.25, Y=6.9 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”.
PAGE 23
TLE 5205-2 Package Outlines P-TO220-7-12 (Plastic Transistor Single Outline Package) 10 ±0.2 A B 9.9 ±0.2 1.27 ±0.1 2.4 13 ±0.5 C 0.05 0.5 ±0.1 0...0.15 2.4 7x 0.6 ±0.1 6x 1.27 1) 0.25 M A B C Typical Metal surface min. X=7.25, Y=12.3 All metal surfaces tin plated, except area of cut. Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Data Sheet 9.25 ±0.2 2.8 ±0.2 3.7 -0.15 0...0.3 11±0.5 1) 12.95 17 ±0.3 15.65 ±0.3 8.5 4.