User's Manual

Table Of Contents
eUniStone
PBA 31309
General Device Overview
User’s Manual Intel Public 12
Hardware Description Revision 1.0, 1-Feb-2013
Descriptions of acronyms used in the pin list:
A1,
A7,
A9,
A11,
A12,
C8,
C9,
D7,
D8,
E8,
E9,
F1,
F9,
F11,
F12
VSS --Ground
B6,
B7,
B8,
C6,
C7,
D6,
D9,
E7
NC - - - - No connection
1. Fixed pull-up/pull-down if JTAG interface is selected, not affected by any chip reset. If JTAG interface is not selected the port is
tristate.
Table 1. Pin Description (Continued)
Pin
No.
Symbol Input /
Output
Supply Voltage During
Reset
After
Reset
Function
Acronym Description
I Input
OOutput
OD Output with open drain capability
ZTristate
PU Pull-up
PD Pull-down
A Analog (e.g. AI means analog input)
S Supply (e.g. SO means supply output)