Datasheet

Datasheet, Volume 2 101

Processor Integrated I/O (IIO) Configuration Registers
3.2.4.84 ERRSID—Error Source Identification Register
4RW1CS 0b
First Uncorrectable Fatal
Set when bit 2 is set (from being clear) and the message causing bit 2 to be set is
an ERR_FATAL message.
3RW1CS 0b
Multiple Error Fatal/Nonfatal Received
Set when either a fatal or a non-fatal error message is received and Error Fatal/
Nonfatal Received is already set, that is, log from the 2nd Fatal or No fatal error
message onwards
2RW1CS 0b
Error Fatal/Nonfatal Received
Set when either a fatal or a non-fatal error message is received and this bit is
already not set; that is, log the first error message. When this bit is set, bit 3
could be either set or clear.
1RW1CS 0b
Multiple Correctable Error Received
Set when either a correctable error message is received and Correctable Error
Received bit is already set; that is, log from the 2nd Correctable error message
onwards.
0RW1CS 0b
Correctable Error Received
Set when a correctable error message is received and this bit is already not set;
that is, log the first error message.
ERRSID
Bus: 0 Device: 0 Function: 0 Offset: 17Ch
Bus: 0 Device: 1 Function: 0–1 Offset: 17Ch
Bus: 0 Device: 2 Function: 0–3 Offset: 17Ch
Bus: 0 Device: 3 Function: 0–3 Offset: 17Ch
Bit Attr
Reset
Value
Description
31:16 ROS-V 0h
Fatal Non Fatal Error Source ID
Requestor ID of the source when an Fatal or Non Fatal error message is received
and the Error Fatal/Nonfatal Received bit is not already set; that is, log ID of the
first Fatal or Non Fatal error message. When the root port itself is the cause of the
received message (virtual message), then a Source ID of CPUBUSNO0:DevNo:0 is
logged into this register.
15:0 ROS-V 0h
Correctable Error Source ID
Requestor ID of the source when a correctable error message is received and the
Correctable Error Received bit is not already set; that is, log ID of the first
correctable error message. When the root port itself is the cause of the received
message (virtual message), then a Source ID of CPUBUSNO0:DevNo:0 is logged
into this register.
RPERRSTS
Bus: 0 Device: 0 Function: 0 Offset: 178h
Bus: 0 Device: 1 Function: 0–1 Offset: 178h
Bus: 0 Device: 2 Function: 0–3 Offset: 178h
Bus: 0 Device: 3 Function: 0–3 Offset: 178h
Bit Attr
Reset
Value
Description