Datasheet

Processor Uncore Configuration Registers
316 Datasheet, Volume 2
4.2.4 System Address Decoder Registers (CBO)
4.2.4.1 PAM0123—CBO SAD PAM Register
PAM0123
Bus: 1 Device: 12 Function: 6 Offset: 40h
Bit Attr
Reset
Value
Description
31:30 RV 0h Reserved
29:28 RW 0h
PAM3_HIENABLE: 0D4000h–0D7FFFh Attribute (HIENABLE)
This field controls the steering of read and write cycles that address the BIOS area
from 0D4000h to 0D7FFFh.
00 = DRAM Disabled: All accesses are directed to DMI.
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to DMI.
10 = Write Only: All writes are send to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
27:26 RV 0h Reserved
25:24 RW 0h
PAM3_LOENABLE: 0D0000h-0D3FFFh Attribute (LOENABLE)
This field controls the steering of read and write cycles that address the BIOS area
from 0D0000h to 0D3FFFh.
00 = DRAM Disabled: All accesses are directed to DMI.
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to DMI.
10 = Write Only: All writes are send to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
23:22 RV 0h Reserved
21:20 RW 0h
PAM2_HIENABLE: 0CC000h-0CFFFFh Attribute (HIENABLE)
This field controls the steering of read and write cycles that address the BIOS area
from 0CC000h to 0CFFFFh.
00 = DRAM Disabled: All accesses are directed to DMI.
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to DMI.
10 = Write Only: All writes are send to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
19:18 RV 0h Reserved
17:16 RW 0h
PAM2_LOENABLE: 0C8000h-0CBFFFh Attribute (LOENABLE)
This field controls the steering of read and write cycles that address the BIOS area
from 0C8000h to 0CBFFFh.
00 = DRAM Disabled: All accesses are directed to DMI.
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to DMI.
10 = Write Only: All writes are send to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
15:14 RV 0h Reserved
13:12 RW 0h
PAM1_HIENABLE: 0C4000h-0C7FFFh Attribute (HIENABLE)
This field controls the steering of read and write cycles that address the BIOS area
from 0C4000h to 0C7FFFh.
00 = DRAM Disabled: All accesses are directed to DMI.
01 = Read Only: All reads are sent to DRAM. All writes are forwarded to DMI.
10 = Write Only: All writes are send to DRAM. Reads are serviced by DMI.
11 = Normal DRAM Operation: All reads and writes are serviced by DRAM.
11:10 RV 0h Reserved