Datasheet

Register Description
92 Datasheet
2.13 Memory Thermal Control
2.13.1 MC_THERMAL_CONTROL0
MC_THERMAL_CONTROL1
MC_THERMAL_CONTROL2
Controls for the Integrated Memory Controller thermal throttle logic for each channel.
2.13.2 MC_THERMAL_STATUS0
MC_THERMAL_STATUS1
MC_THERMAL_STATUS2
Status registers for the thermal throttling logic for each channel.
Device: 4, 5, 6
Function: 3
Offset: 48h
Access as a Dword
Bit Type
Reset
Value
Description
2RW1
APPLY_SAFE.
Enable the application of safe values while
MC_THERMAL_PARAMS_B.SAFE_INTERVAL is exceeded.
1:0 RW 0
THROTTLE_MODE. S
elects throttling mode.
00 = Throttle disabled
01 = Open Loop: Throttle when Virtual Temperature is greater than
MC_THROTTLE_OFFSET.
10 = Closed Loop: Throttle when MC_CLOSED_LOOP.THROTTLE_NOW is set.
11 = Closed Loop: Throttle when MC_DDR_THERM_COMMAND.THROTTLE is set
and the MC_DDR_THERM pin is asserted OR OLTT will be implemented
(Condition 1).
Device: 4, 5, 6
Function: 3
Offset: 4Ch
Access as a Dword
Bit Type
Reset
Value
Description
29:4 RO 0
CYCLES_THROTTLED.
The number of throttle cycles, in increments of 256 Dclks, triggered in any rank
in the last SAFE_INTERVAL number of ZQs.
3:0 RO 0
RANK_TEMP.
The bit specifies whether the rank is above throttling threshold.