Datasheet

Register Description
96 Datasheet
2.13.9 MC_RANK_VIRTUAL_TEMP0
MC_RANK_VIRTUAL_TEMP1
MC_RANK_VIRTUAL_TEMP2
This register contains the 8 most significant bits [37:30] of the virtual temperature of
each rank. The difference between the virtual temperature and the sensor temperature
can be used to determine how fast fan speed should be increased. The value stored is
right shifted one bit to the right with respect to the corresponding MC_Throttle_Offset
register value. For example when When a rank throttle offset is set to 40h, the value
read from the corresponding in MC_RANK_VIRTUAL_TEMP register is 20h.
When there are more than 4 ranks attached to the channel, the thermal throttle logic is
shared.
2.13.10 MC_DDR_THERM_COMMAND0
MC_DDR_THERM_COMMAND1
MC_DDR_THERM_COMMAND2
This register contains the command portion of the DDR_THERM# functionality as
described in the processor datasheet (i.e., what an assertion of the pin does).
Device: 4, 5, 6
Function: 3
Offset: 98h
Access as a Dword
Bit Type
Reset
Value
Description
31:24 RO 0
RANK3. Rank 3 virtual temperature.
23:16 RO 0
RANK2. Rank 2 virtual temperature.
15:8 RO 0
RANK1. Rank 1 virtual temperature.
7:0 RO 0
RANK0. Rank 0 virtual temperature.
Device: 4, 5, 6
Function: 3
Offset: 9Ch
Access as a Dword
Bit Type
Reset
Value
Description
3RW0
THROTTLE.
Force throttling when DDR_THERM# pin is asserted.
2RW0
Reserved
1RW0
DISABLE_EXTTS.
Response to DDR_THERM# pin is disabled. ASSERTION and DEASSERTION
fields in the register MC_DDR_THERM_STATUS are frozen.
0RW0
LOCK.
When set, all bits in this register are RO and cannot be written.