Computer Hardware User Manual

Intel® 460GX Chipset Software Developer’s Manual 2-11

2.4.2 SDC

2.4.2.1 SEC0_D_FERR: Data on First Memory Card B SEC

Bus CBN, Device Number: 04h

Address Offset: 40-47h Size: 64 bits

Default Value: 0 Attribute: Read Only, New Value Latched

anytime appropriate FERR register

bit is set

This register records and latches the data corresponding to the first SEC detected by memory

interface 0 in the SDC.

Bits

Description

63:0 DE - System Data of Error.

2.4.2.2 SEC0_ECC_FERR: ECC on First Memory Card B SEC

Bus CBN, Device Number: 04h

Address Offset: 48h Size: 8 bits

Default Value: 00h Attribute: Read Only, New Value Latched

anytime appropriate FERR register

bit is set

This register records and latches the ECC checkbits corresponding to the first SEC detected by

memory interface 0 in the SDC

Bits

Description

7:0 ECC - ECC of Error.

2.4.2.3 SEC0_TXINFO_FERR: TXINFO on First Memory Card B SEC

Bus CBN, Device Number: 04h

Address Offset: 49-4Ah Size: 16 bits

Default Value: 00h Attribute: Read Only, New Value Latched

anytime appropriate FERR register

bit is set

This register records the ITID and failing chunk corresponding to the first SEC detected by

memory interface 0 in the SDC.

Bits

Description

15:9 reserved(0)

8:6 DC - Data Chunk of ITID.

5:0 ITID - ITID of error.