Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

Introduction
18 Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide
Core Power Core power refers to a power rail that is on only during full-power operation.
These power rails are on when the active-low PSON signal is asserted to the
power supply. The core power rails that are distributed directly from the power
supply are: +12 V, +5 V, and +3.3 V.
Crosstalk The reception on a victim network of a signal imposed by aggressor network(s)
through inductive and capacitive coupling between the networks.
• Backward Crosstalk – Coupling that creates a signal in a victim network that
travels in the opposite direction as the aggressor’s signal.
• Forward Crosstalk – Coupling that creates a signal in a victim network that
travels in the same direction as the aggressor’s signal.
• Even Mode Crosstalk – Coupling from a signal or multiple aggressors when
all the aggressors switch in the same direction that the victim is switching.
• Odd Mode Crosstalk – Coupling from a signal or multiple aggressors when
all the aggressors switch in the opposite direction that the victim is switching.
Derived power A derived power rail is any power rail that is generated from another power rail
using an on-board voltage regulator. For example, +2.5 V is derived from a +5 V
power rail using a voltage regulator.
Dual Processor (DP) Used to specify a system configuration using two processors.
Electromagnetic
Compatibility (EMC)
The successful operation of electronic equipment in its intended electromagnetic
environment.
Electromagnetic
Interference (EMI)
Electromagnetic radiation from an electrical source that exceeds the federally
regulated limits.
Flight Time Flight time is a term in the timing equation that includes the signal propagation
delay, any effects the system has on the Tco of the driver, plus any adjustments
to the signal at the receiver needed to guarantee the setup time of the receiver.
More precisely, flight time is defined as:
• The time difference between a signal at the input pin of a receiving agent
crossing the switching voltage (adjusted to meet the receiver manufacturer’s
conditions required for AC timing specifications, i.e., ringback, etc.) and the
output pin of the driving agent crossing the switching voltage when only the
driver can drive a test load used to specify the driver’s AC timings.
• Maximum and Minimum Flight Time – Flight time variations are caused by
many different parameters. The more obvious causes include variation of
the board dielectric constant, changes in load condition, crosstalk, power
noise, variation in termination resistance, and differences in I/O buffer
performance as a function of temperature, voltage, and manufacturing
process. Some less obvious causes include effects of Simultaneous
Switching Output (SSO) and packaging effects.
• Maximum flight time is the largest acceptable flight time that a network
experiences under all conditions.
• Minimum flight time is the smallest acceptable flight time that a network
experiences under all conditions.
Full-power During full-power operation, all components on the motherboard remain
powered. Note that full-power operation includes both the full-on operating state,
and the S1 (processor stop-grant) state.
GTLREF Reference voltage for AGTL+ input pins.
Inter-Symbol
Interference (ISI)
The effect of a previous signal (or transition) on the interconnect delay. For
example, when a signal is transmitted down a line, and the reflections due to the
transition have not completely dissipated, the following data transition launched
onto the bus is affected. ISI is dependent upon frequency, time delay of the line,
and the reflection coefficient at the driver and receiver. ISI can impact both timing
and signal integrity.
Network The network is the trace of a Printed Circuit Board (PCB) that completes an
electrical connection between two or more components.
Overshoot The maximum voltage observed for a signal at the device pad, measured with
respect to VCC.
Terminology Description