ITP700 Debug Port Design Guide

111

K48 L44 L88 5.582538E-01

C48 8 16 7.375378E-14

K56 L55 L66 6.355457E-01

C56 10 12 1.071086E-13

K57 L55 L77 4.534765E-01

C57 10 14 1.729760E-15

K58 L55 L88 3.313096E-01

C58 10 16 7.301408E-16

K67 L66 L77 6.472215E-01

C67 12 14 1.065396E-13

K68 L66 L88 4.534765E-01

C68 12 16 1.735450E-15

K78 L77 L88 6.355457E-01

C78 14 16 1.071086E-13

.ENDS SECT

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********** Package Models ***********

* QSOP Package Model (QSOP)

*EXT =(External Input to Pin) INT= (Internal Output of the Pin) GNDREF= (0V)

****************************************************************

.SUBCKT QSOP EXT INT GNDREF

CPAD EXT GNDREF 0.5PF

CPKG 82 GNDREF 0.5PF

RPKG3 83 INT 0.01

LPKG1 EXT 82 1NH

LPKG2 82 83 1NH

.ENDS QSOP

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