Datasheet

PENTIUM® III XEON™ PROCESSOR AT 600 MHz to 1 GHz with 256KB L2 Cache
SIGNAL QUALITY
32
4.2.1 AGTL+ Ringback Tolerance Specifications
Table 21 provides the AGTL+ signal quality specifications for Pentium III Xeon processors at 600 MHz+ for use in
simulating signal quality at the processor core pads. Figure 12 describes the signal quality waveform for AGTL+ signals at
the processor core pads. For more information on the AGTL+ interface, see the Pentium II processor Developer's Manual
(Order Number 243341).
Table 21. AGTL+ Signal Groups Ringback Tolerance Specifications at the processor Core
1, 2 ,3
T# Parameter Min Unit Figure Notes
α: Overshoot 100 mV Figure 12 4,8
τ: Minimum Time at High 0.50 nS Figure 12
ρ: Amplitude of Ringback –200 mV Figure 12 5,7,8
φ: Final Settling Voltage 200 mV Figure 12 8
δ: Duration of Squarewave Ringback N/A nS Figure 12
NOTES:
1. Unless otherwise noted, all guidelines in this table apply to all Pentium III Xeon processor at 600 MHz+ frequencies and cache sizes.
2. Specifications are for the edge rate of 0.3 – 0.8 V/nS.
3. All values specified by design characterization.
4. Please see Table 21 for maximum allowable overshoot.
5. Ringback between Vref +100mV and Vref +200mV or Vref –200mV and Vref –100mV requires the flight time measurements to be
adjusted as described in the Intel® AGTL+ Specification (Pentium® II Developers Manual). Ringback below (Vref + 100mV) or above
(Vref – 100mV) is not supported.
6. Intel recommends not exceeding a ringback value of 2/3 V
TT
+/- 120mV to allow margin for other sources of system noise.
7. A negative value of ρ indicates that the amplitude of ringback is above 2/3 V
TT. (i.e.
ρ =
–100mV specifies the signal cannot ringback
below
2/3 V
TT + 100mV).
8. ρ and are φ measured relative to 2/3 V
TT.
α
is measured relative to
2/3 V
TT + 200mV.
τ
α
ρ
φ
V
start
2/3V
TT
-0.2
Time
000914a
Clock
Note: High to Low case is analogous.
δ
1.25V Clk Ref
2/3V
TT
2/3V
TT
+0.2
000914a
Figure 12. Low to High AGTL+ Receiver Ringback Tolerance
4.2.2 AGTL+ OVERSHOOT/UNDERSHOOT GUIDELINES
Overshoot guidelines based on magnitude and duration of an overshoot/undershoot pulse (illustrated in Figure 13) are
given in Table 22.
Overshoot/Undershoot is the absolute value of the maximum voltage differential across the input buffer relative to the
termination voltage (V
TT
). The overshoot/undershoot guideline limits transitions beyond VTT or VSS due to the fast signal
edge rates. The processor can be damaged by repeated Overshoot/Undershoot events on 1.5 V or 2.5 V tolerant buffers
if the potential is large enough (i.e., if the overshoot/undershoot is great enough). Determining the impact of an
overshoot/undershoot condition requires knowledge of the Magnitude, the Pulse Duration, and the Activity Factor.