Datasheet

APPENDIX
104
Table 62. I/O Signals (Single Driver)
Name Active Level Clock Signal Group Qualified
SELFSB1 TBD TBD TBD TBD
BR0# Low BCLK AGTL+ I/O Always
BP[3:2]# Low BCLK AGTL+ I/O Always
BPM[1:0]# Low BCLK AGTL+ I/O Always
D[63:00]# Low BCLK AGTL+ I/O DRDY#
DBSY# Low BCLK AGTL+ I/O Always
DEP[7:0]# Low BCLK AGTL+ I/O DRDY#
DRDY# Low BCLK AGTL+ I/O Always
LOCK# Low BCLK AGTL+ I/O Always
REQ[4:0]# Low BCLK AGTL+ I/O ADS#, ADS#+1
RP# Low BCLK AGTL+ I/O ADS#, ADS#+1
SMBDAT High SMBCLK SMBus I/O
Table 63. I/O Signals (Multiple Driver)
Name Active Level Clock Signal Group Qualified
AERR# Low BCLK AGTL+ I/O ADS#+3
BERR# Low BCLK AGTL+ I/O Always
BNR# Low BCLK AGTL+ I/O Always
BINIT# Low BCLK AGTL+ I/O Always
HIT# Low BCLK AGTL+ I/O Always
HITM# Low BCLK AGTL+ I/O Always
PICD[1:0] High PICCLK APIC I/O Always