User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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9.4.4. AR11

Overscan Color Register
I/O (and Memory Offset) Address: Read at 3C1h and Write at 3C0h; (index=11h)
Default: UUh (U=Undefined)
Attributes: Read/Write
Bit Description
7:0 Overscan. These 8 bits select the overscan (border) color. The border color is displayed during the
blanking intervals. For monochrome displays, this value should be set to 00h.
9.4.5. AR12

Memory Plane Enable Register
I/O (and Memory Offset) Address: Read at 3C1h and Write at 3C0h; (index=12h)
Default: 00UU UUUUb (U=Undefined)
Attributes: Read/Write
7 6 5 4 3 2 1 0
Reserved (00) Video Status Mux Enable
Plane 3
Enable
Plane 2
Enable
Plane 1
Enable
Plane 0
Bit Description
7:6 Reserved. Read as 0s.
5:4 Video Status Mux. These 2 bits are used to select 2 of the 8 possible palette bits (P7-P0) to be made
available to be read via bits 5 and 4 of the Input Status Register 1 (ST01). The table below shows the
possible choices.
Bit [5:4] ST01 Bit 5 ST01 Bit 4
00 P2 (default) P0 (default)
01 P5 P4
10 P3 P1
11 P7 P6
These bits are typically unused by current software; they are provided for EGA compatibility.
3:0 Enable Plane [3:0]. These 4 bits individually enable the use of each of the 4 memory planes in
providing 1 of the 4 bits used in video output to select 1 of 16 possible colors from the palette to be
displayed.
0 = Disable the use of the corresponding memory plane in video output to select colors, forcing the bit
that the corresponding memory plane would have provided to a value of 0.
1 = Enable the use of the corresponding memory plane in video output to select colors.
Note:
AR12 is referred to in the VGA standard as the Color Plane Enable Register. The words “plane,” “color
plane,” “display memory plane,” and “memory map” have been all been used in IBM literature on the
VGA standard to describe the 4 separate regions in the frame buffer that are amongst which pixel color
or attributes information is split up and stored in standard VGA planar modes. This use of multiple terms
for the same subject was considered confusing; therefore, AR12 is called the Memory Plane Enable
Register.