User's Manual
Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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105
9.4.6. AR13
Horizontal Pixel Panning Register
I/O (and Memory Offset) Address: Read at 3C1h and Write at 3C0h; (index=13h)
Default: 0Uh (U=Undefined)
Attributes: Read/Write
7 4 3 0
Reserved (0000) Horizontal Pixel Shift
Bit Description
7:4 Reserved.
3:0 Horizontal Pixel Shift 3-0. This field holds a 4-bit value that selects the number of pixels by which the
image is shifted horizontally to the left. This function is available in both text and graphics modes.
In text modes with a 9-pixel wide character box, the image can be shifted up to 9 pixels to the left. In text
modes with an 8-pixel wide character box, and in graphics modes other than those with 256 colors, the
image can be shifted u0p to 8 pixels to the left.
In standard VGA mode 13h (where bit 6 of the Mode Control Register, AR10, is set to 1 to support 256
colors), bit 0 of this register must remain set to 0, and the image may be shifted up to only 4 pixels to
the left. In this mode, the number of pixels by which the image is shifted can be further controlled using
bits 6 and 5 of the Preset Row Scan Register (CR08).
Number of Pixels Shifted
8-Pixel Text 256-Color
Bits [3:0] 9 Pixel Text & Graphics Graphics
0h 1 0 0
1h 2 1 Undefined
2h 3 2 1
3h 4 3 Undefined
4h 5 4 2
5h 6 5 Undefined
6h 7 6 3
7h 8 7 Undefined
8h 0 Undefined Undefined










