User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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Bit Description
15:14 4:2:2 Byte Order. Affects the byte order for 4:2:2 data. For other data formats these bits should be set
to zero.
00 = Normal
01 = UV Swap
10 = Y Swap
11 = Y and UV swap
13:10 Source Format.
0000 = Reserved
0001 = Reserved
0010 = RGB 5:5:5
0011 = RGB 5:6:5
0100 = Reserved
0101 = Reserved
0110 = Reserved
0111 = Reserved
1000 = YUV 4:2:2
1001 = YUV 4:1:1
1010 = Reserved
1011 = Reserved
1100 = YUV 4:2:0 (MPEG-1 or 2)
1101 = Reserved
1110 = YUV 4:1:0
1111 = Reserved
9 Flip TV-Out Field Select. Selects which TV-Out field polarity for flips
0 = Between F0 and F1
1 = Between F1 and F0
8:7 Flip Qualification. Flip Qualification (& Display VBLANK). Flips can be caused automatically by the
capture port logic on the completion of a field or frame capture. This event will be synchronized either
with the display/overlay VBLANK event or the display/overlay VBLANK event combined with the
current TV field. Manual flips can occur by an update of the overlay registers due to the writing of the
Overlay Update Address Register when the register data specifies that the buffer/field should be
changed or through a command packet that specifies a register update that changes the buffer/field.
This can also be synchronized with the TV field.
Manual flip command
00 = Flip (standard)
01 = Flip & TV-Out Field #
Automatic flipping
10 = Capture Frame/field
11 = Capture Frame/field & TV-Out Field #
11 = is a Reserved encoding for Intel
®
810 chipset
6 Vertical Initial Phase Select. Selects which initial vertical phase register to use. The choice is to
always use the same register or alternate (for field processing) between the two registers.
This bit will be overridden by the capture port when autoflipping.
0 = Use only field/buffer 0 initial vertical phase
1 = Use both initial vertical phase values