User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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297
Bit Description
5 Display/Flip Type. This bit affects the buffer addressing used for buffer display and the use of the
initial vertical phase. Frame mode starts addressing at the value contained in the buffer address
register and increments by stride as it increments from line to line. Initial phase selection is based on
the buffer and the vertical Initial phase select bit.
Field mode uses the field bit to determine if the start address should be the value in the start address
register or the start address register plus stride. Field mode will increment the address by two times the
stride as it increments from line to line. Initial phase selection is based on the field and the vertical
Initial phase select.
This bit will be overridden by the capture port when autoflipping.
0 = Frame Mode
1 = Field Mode
4 Ignore Buffer and Field. When set, don’t update the buffer and field from command register.
0 = Use buffer and field data to update buffer/field
1 = Don’t update buffer/field
2:1 Buffer and field. Selects on which buffer and field for display. This determines which buffer and field
will be displayed when the overlay is enabled or when the ignore bit was clear. It would otherwise be
ignored and the internal buffer/field values would be used. These are readable through the status
register.
00 = Buffer 0 Field 0
01 = Buffer 0 Field 1
10 = Buffer 1 Field 0
11 = Buffer 1 Field 1
0 Overlay Enable. Changing this bit from a 0 to a 1 will cause the overlay to begin display after the next
qualified flip event. A disable (1->0) will cause the overlay to stop displaying an image on the next
display VBLANK.
0 = Disable (No display or memory fetches)
1 = Enable