User's Manual

IntelĀ® 815 Chipset: Graphics Controller PRM, Rev 1.0
R
312
16.1.9. INSTDONE—Instruction Stream Interface Done Register
Address Offset: 02090h
Default Value: FFFF FFFFh
Access: Read only.
Size: 32 bits
This read only register reports engine done signals.
31 24
Reserved
23 19 18 17 16
Reserved PC_Done WM_Done IT_Done
15 14 13 12 11 10 9 8
CC_DONE MG_DON
E
DG_DON
E
QCC_DO
NE)
FTCH_DO
NE
MEC_DO
NE
MECO_D
ONE
CCMC_D
ONE
7 6 5 4 3 2 1 0
Reserved Blitter
Done
Mapping
Eng. Done
Render
Eng. Done
Batch
Done
Reserved Intr. Ring
Empty
Low Prior.
Ring Emp.
Bit Description
32:19
Reserved
18
Plane Converter Done (PC_DONE)
17
Window Mask Done (WM_DONE)
16
Interpolator Done (IT_DONE)
15
Color Calculator Cone (CC_DONE)
14
Mapping Engine Address Generator Done (MG_DONE)
13
Mapping Engine Dependency Address Done (DG_DONE)
12
Mapping Engine Cache Controller Done (QCC_DONE)
11
Mapping Fetch Unit Done (FTCH_DONE)
10
Mapping Engine Cache Done (MEC_DONE)
9
Mapping Engine Cache Output Done (MECO_DONE)
8
CCMC_DONE
7
Reserved.
6
Blitter Done.
5
Mapping Engine Done