User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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Table 2. Memory-Mapped Registers
Address Offset Symbol Register Name Access
Overlay Registers (30000h−
−−
−03FFFFh)
(For additional address offsets in the double-buffering scheme, see Overlay Chapter)
30000h−30003h OV0ADD Overlay 0 Register Update Address Overlay 0 R/W
30004h−30007h — Reserved —
30008h−3000Bh DOV0STA Display/Overlay 0 Status RO
3000Ch−3000Fh — Reserved —
30010h−30027h GAMMA[5:0] Gamma Correction [5:0] (6 registers) R/W
30028h−300FFh — Reserved —
30100h–30103 OBUF_0Y Overlay Buffer 0 Y Pointer RO
30104h−30107h OBUF_1Y Overlay Buffer 1 Y Pointer RO
30108h−3010Bh OBUF_0U Overlay Buffer 0 U Pointer RO
3010Ch−3010Fh OBUF_0V Overlay Buffer 0 V Pointer RO
30110h−30113h OBUF_1U Overlay Buffer 1 U Pointer RO
30114h−30117h OBUF_1V Overlay Buffer 1 V Pointer RO
30118h−3011Bh OV0STRIDE Overlay 0 Stride RO
3011Ch−3011Fh YRGB_VPH Y/RGB Vertical Phase RO
30120h−30123h UV_VPH UV Vertical Phase RO
30124h−30127h HORZ_PH Horzontal Phase RO
30128h−3012Bh INIT_PH Initial Phase RO
3012Ch−3012Fh DWINPOS Destination Window Position RO
30130h−30133h DWINSZ Destination Window Size RO
30134h−30137h SWID Source Width RO
30138h−3013Bh SWIDQW Source Width In QWords RO
3013Ch−3013Fh SHEIGHT Source Height RO
30140h−30143h YRGBSCALE Y/RGB Scale Factor RO
30144h−30147h UVSCALE U V Scale Factor RO
30148h−3014Bh OV0CLRC0 Overlay 0 Color Correction 0 ` RO
3014Ch−3014Fh OV0CLRC1 Overlay 0 Color Correction 1 RO
30150h−30153h DCLRKV Destination Color Key Value RO
30154h−30157h DCLRKM Destination Color Key Mask RO
30158h−3015Bh SCLRKVH Source Color Key Value High RO
3015Ch−3015Fh SCLRKVL Source Color Key Value Low RO
30160h−30163h SCLRKM Source Color Key Mask RO
30164h−30167h OV0CONF Overlay 0 Configuration RO
30168h−3016Bh OV0CMD Overlay 0 Command RO
30170h−30173h AWINPOS Alpha Blend Window Position RO
30174h−30177h AWINZ Alpha Blend Window Size RO
30178h−3FFFFh  Reserved 