User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
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19.2.2. GPIOB

General Purpose I/O Control Register B
Address offset : 05014h
Default value : 00h, 00h, 000U0000b, 000U0000b
Access : Read / write
Size : 32 bit
This register controls the general purpose I/O pins LTVCK and LTVDA, which are used to create an I
2
C
connection to the external Digital Video Out controller.
31 16
Reserved
15 13 12 11 10 9 8
Reserved LTVDA
Data In
LTVDA
Data value
LTVDA
Data mask
LTVDA
Direction
value
LTVDA
Direction
Mask
7 5 4 3 2 1 0
Reserved LTVCK
Data In
LTVCK
Data value
LTVCK
Data mask
LTVCK
Direction
value
LTVCK
Direction
Mask
Bit Description
31:16 Reserved.
15:13 Reserved.
12 LTVDA Data In—RO: This is the value that is sampled on the LTVDA pin as an input.
The Data In bits [12], [4] of the GPIOA (GPIOB) register are read only, however, data is only latched
into these bits when a write is done to the respective bytes of the GPIOA (GPIOB) register. Thus a
read of the Data In bits must be preceded with a dummy write.
11 LTVDA Data Value—R/W: This is the value that should be place on the LTVDA pin as an output. This
value is only written into the register if LTVDA DATA MASK is also asserted. The value will appear on
the pin if this data value is actually written to this register and the LTVDA DIRECTION VALUE
contains a value that will configure the pin as an output.
10 LTVDA Data Mask—R/W: This is a mask bit to determine whether the LTVDA DATA VALUE bit
should be written into the register.
0 = Do NOT write LTVDA Data Value bit (default).
1 = Write LTVDA Data Value bit.
9 LTVDA Direction Value—R/W: This is the value that should be used to define the ouput enable of the
LTVDA pin. This value is only written into the register if LTVDA DIRECTION MASK is also asserted.
The value that will appear on the pin is defined by what is in the register for the LTVDA DATA
VALUE.bit.
0 = Pin is configured as an input (default)
1 = Pin is configured as an output.