User's Manual

Intel® 815 Chipset: Graphics Controller PRM, Rev 1.0
R
85
9.2.2. SR00

Sequencer Reset
I/O (and Memory Offset) Address: 3C5h(Index=00h)
Default: 00h
Attributes: Read/Write
7 2 1 0
Reserved (000000) Reserved
(scratch
bit)
Reserved
(scratch
bit)
Bit Descriptions
7:2 Reserved. Read as 000000. Write has no effect.
1 Read/Write scratch bit required for VGA compatibility. Read previously written value. Write stores
written value.
This bit is a fully readable/writeable MMIO location in the hardware. It has no other functionality in the
hardware.
0 Read/Write scratch bit required for VGA compatibility. Read previously written value. Write stores
written value.
This bit is a fully readable/writeable MMIO location in the hardware. It has no other functionality in the
hardware.
Programming Hints :
• It has been noted that legacy Video BIOS code has the bits [1:0] programmed to “11” values for
reason not fully understood. Experiment was done on 810 Video BIOS with leaving these 2 bits at
the default values. It was found that full screen DOS box mode does not behave properly in that
case. However, with Video BIOS programming up the bits to “11” values, the problem was
corrected.