Datasheet

Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 17
Figures
1Intel
®
Xeon
®
Processor C5500/C3500 Series on the Picket Post Platform -- UP
Configuration ..........................................................................................................25
2Intel
®
Xeon
®
Processor C5500/C3500 Series on the Picket Post Platform -- DP
Configuration ..........................................................................................................26
3 Independent Code Layout .........................................................................................40
4 Lockstep Code Layout...............................................................................................42
5 Dual-Channel Symmetric (Interleaved) and Dual-Channel Asymmetric Modes ..................44
6Intel
®
Flex Memory Technology Operation...................................................................44
7 DIMM Population Within a Channel .............................................................................46
8 DIMM Population Within a Channel for Two Slots per Channel ........................................ 47
9 Error Signaling Logic ................................................................................................ 50
10 First Level Address Decode Flow.................................................................................52
11 Mapping Throttlers to Ranks......................................................................................62
12 Ping().....................................................................................................................71
13 Ping() Example........................................................................................................71
14 GetDIB().................................................................................................................72
15 Device Info Field Definition........................................................................................72
16 Revision Number Definition .......................................................................................73
17 GetTemp()..............................................................................................................74
18 GetTemp() Example ................................................................................................. 74
19 PCI Configuration Address.........................................................................................75
20 PCIConfigRd() .........................................................................................................75
21 PCIConfigWr() .........................................................................................................77
22 Thermal Status Word................................................................................................79
23 Thermal Data Configuration Register ..........................................................................80
24 Machine Check Read MbxSend() Data Format ..............................................................80
25 ACPI T-State Throttling Control Read / Write Definition .................................................82
26 MbxSend() Command Data Format.............................................................................83
27 MbxSend()..............................................................................................................83
28 MbxGet()................................................................................................................85
29 Temperature Sensor Data Format ..............................................................................89
30 PECI Power-up Timeline............................................................................................90
31 SMBus Block-Size Configuration Register Read.............................................................99
32 SMBus Block-size Memory Register Read.....................................................................99
33 SMBus Word-Size Configuration Register Read........................................................... 100
34 SMBus Word-Size Memory Register Read .................................................................. 100
35 SMBus Byte-Size Configuration Register Read............................................................ 101
36 SMBus Byte-Size Memory Register Read ................................................................... 102
37 SMBus Block-Size Configuration Register Write .......................................................... 103
38 SMBus Block-Size Memory Register Write.................................................................. 103
39 SMBus Word-Size Configuration Register Write .......................................................... 104
40 SMBus Word-Size Memory Register Write.................................................................. 104
41 SMBus Configuration (Byte Write, PEC enabled) ......................................................... 104
42 SMBus Memory (Byte Write, PEC enabled)................................................................. 105
43 Intel
®
Xeon
®
Processor C5500/C3500 Series Dual Processor Configuration Block
Diagram ............................................................................................................... 106
44 PCI Express Layering Diagram................................................................................. 119
45 Packet Flow through the Layers ............................................................................... 120
46 Enumeration in System with Transparent Bridges and Endpoint Devices ........................ 137
47 Non-Transparent Bridge Based Systems.................................................................... 138
48 NTB Ports Connected Back-to-Back........................................................................... 139
49 NTB Port on Intel
®
Xeon
®
Processor C5500/C3500 Series Connected to Root Port -
Symmetric Configuration......................................................................................... 140