Datasheet

Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 265
PCI Express Non-Transparent Bridge
3.20.3.19 DEVSTS: PCI Express Device Status Register
The PCI Express Device Status register provides information about PCI Express device
specific parameters associated with the device.
Register:DEVSTS
Bar:PB01BASE + 500h + Offset, SB01BASE + 500h + Offset
Bus:M
Device:0
Function: 0
Offset: 9Ah
Bit Attr Default Description
15:6 RsvdZ 000h Reserved.
5RO 0h
Transactions Pending: Does not apply. Bit is hardwired to 0
NTB is a special case bridging device following the rule below.
PCI Express Base Specification, Revision 2.0 states. Root and Switch Ports
implementing only the functionality required by this document do not issue
Non-Posted Requests on their own behalf, and therefore are not subject to
this case. Root and Switch Ports that do not issue Non-Posted Requests on
their own behalf hardwire this bit to 0b.
4RO 0
AUX Power Detected
Does not apply to IIO
3 RW1C 0
Unsupported Request Detected
This bit applies only to the root/DMI ports.This bit indicates that the NTB
secondary detected an Unsupported Request. Errors are logged in this
register regardless of whether error reporting is enabled or not in the Device
Control Register.
1: Unsupported Request detected at the device/port. These unsupported
requests are NP requests inbound that the RP received and it detected them
as unsupported requests (e.g. address decoding failures that the RP
detected on a packet, receiving inbound lock reads, BME bit is clear etc.).
This bit is not set on peer2peer completions with UR status that are
forwarded by the RP to the PCIE link.
0: No unsupported request detected by the RP
2 RW1C 0
Fatal Error Detected
This bit indicates that a fatal (uncorrectable) error is detected by the NTB
secondary device. Errors are logged in this register regardless of whether
error reporting is enabled or not in the Device Control register.
1: Fatal errors detected
0: No Fatal errors detected
1 RW1C 0
Non Fatal Error Detected
This bit gets set if a non-fatal uncorrectable error is detected by the NTB
secondary device. Errors are logged in this register regardless of whether
error reporting is enabled or not in the Device Control register.
1: Non Fatal errors detected
0: No non-Fatal Errors detected
0 RW1C 0
Correctable Error Detected
This bit gets set if a correctable error is detected by the NTB secondary
device. Errors are logged in this register regardless of whether error
reporting is enabled or not in the PCI Express Device Control register.
1: correctable errors detected
0: No correctable errors detected