Datasheet
Intel
®
Xeon
®
Processor C5500/C3500 Series
February 2010 Datasheet, Volume 1
Order Number: 323103-001 411
Reliability, Availability, Serviceability (RAS)
11.7.2.2 PCI Express Hot Plug Interrupts
The Intel
®
Xeon
®
processor C5500/C3500 series IIO generates either an MSI or an Assert/
Deasset_HPGPE message to the PCH over the DMI link when a hot plug event occurs on standard
PCIe interfaces. The GPE messages are selected when bit 3 in MISCCTRLSTS: Misc. Control and
Status Register is set. If this bit is clear, then MSI method is selected (the MSI Enable bit in the
(MSIX)MSGCTRL register does not control selection of GPE vs. MSI method). See the PCI Express
Base Specification, Revision 1.1 for details of MSI generation on a PCIe hotplug event.
A hot plug event is defined as a set of actions: command completed, presence detect changed, MRL
sensor changed, power fault detected, attention button pressed, and data link layer state changed
events. Each of these hot plug events has a corresponding bit in the PCIe slot status, control
registers. The IIO processes hot plug events using the wired-OR (collapsed) mechanism of the various
bits across the ports to emulate the level sensitive need for the legacy interrupts on DMI.
When the output of the wired-OR logic is set, the Assert_HPGPE is sent to the PCH. IIO combines the
virtual message from all the ports and then presents a collapsed set of virtual wire messages to the
PCH. When software clears all the associated register bits (that are enabled to cause an event) across
the ports, the IIO will generate a Deassert_HPGPE message to the PCH.
PRSNT#
Input signal that indicates if a hot pluggable
PCIe card/module is currently plugged into
the slot.
When a change is detected in this signal, the
Presence Detect Event Status register is set
and either an interrupt or a general-purpose
event message Assert/Deassert_HPGPE is
sent to the PCH.
1
PWRFLT#
Input signal from the power controller to
indicate that a power fault has occurred.
When this signal is asserted, the Power Fault
Event Register is set and either an interrupt or
a general-purpose event message Assert/
Deassert_HPGPE message is sent to the
PCH.
1
PWREN#
Output signal allowing software to enable or
disable power to a PCIe slot.
If the Power Controller Register is set, the IIO
asserts this signal.
MRL/EMILS
Manual retention latch status or Electro-
mechanical latch status input indicates that
the retention latch is closed or open. Manual
retention latch is used on the platform to
mechanically hold the card in place and can
be open/closed manually. Electromechanical
latch is used to electromechanically hold the
card in place in place and is operated by
software. MRL is used for card-edge and
EMLSTS# is used for SIOM form factors.
Supported for the serial interface and MRL
change detection results in either an interrupt
or a general-purpose event message Assert/
Deassert_HPGPE message is sent to the
PCH.
1
EMIL
Electromechanical retention latch control
output that opens or closes the retention
latch on the board for this slot. A retention
latch is used on the platform to mechanically
hold the card in place. See the <Blue>PCI
Express Server/Workstation Module
Electromechanical Spec Rev 1.0 for details of
the timing requirements of this pin output.
Supported for the serial interface and is used
only for the SIOM form-factor.
1. For legacy operating systems, the described Assert_HPGPE/Deassert_HPGPE mechanism is used to interrupt
the platform for PCIe hotplug events. For newer operating systems, this mechanism is disabled and the MSI
capability is used by the IIO instead.
Table 130. Hot Plug Interface (Sheet 2 of 2)
Signal
Name
Description Action