Datasheet

4.0 Power Management
This chapter provides information on the following power management topics:
Advanced Configuration and Power Interface (ACPI) States
Processor Core
Integrated Memory Controller (IMC)
Processor Graphics Controller
Figure 8. Processor Power States
G0 Working
S0 Processor powered on (full on mode / connected standby mode)
C0 Active mode
C1 Auto halt
C1E Auto halt, low freq, low voltage
C3 L1/L2 caches flush, clocks off
C6 save core states before shutdown and PLL off
C7 C6 + L3 cache flush
G1 Sleeping
S3 cold Sleep Suspend To Ram (STR)
S4 Hibernate Suspend To Disk (STD), Wakeup on PCH
S5 Soft Off no power,Wakeup on PCH
G3 Mechanical Off
P0
Pn
* Note: Power states availability may vary between the different SKUs
C8 C7 internal voltage removal from all power domains
C9 C8+VCC input to 0V
C10 C9+VR12.6 shut off or PS4
G2 Soft Off
Processor—Power Management
5th Generation Intel
®
Core
Processor Family, Intel
®
Core
M Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and
Mobile Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2 March 2015
44 Order No.: 330834-004v1