Datasheet

Signal Group Type Signals
Single ended DDR3L/DDR3L-RS/
LPDDR3 Bi-
directional
SA_DQ[63:0], SB_DQ[63:0]
Differential DDR3L/DDR3L-RS/
LPDDR3 Bi-
directional
SA_DQSP[7:0], SA_DQSN[7:0], SB_DQSP[7:0], SB_DQSN[7:0]
Reference Voltage Signals
Voltage DDR3L/DDR3L-RS/
LPDDR3 Output
SM_VREF_CA, SM_VREF_DQ0, SM_VREF_DQ1
Testability (ITP/XDP)
Single ended GTL Input PROC_TCK, PROC_TDI, PROC_TMS, PROC_TRST#
Single ended GTL PROC_TDO
Single ended GTL BPM#[7:0]
Single ended GTL PREQ#
Single ended GTL PRDY#
Control Sideband
Single ended GTL Input/Open
Drain Output
PROCHOT#
Single ended Asynchronous
CMOS Output
IVR_ERROR
Single ended Open Drain Output THERMTRIP#
Single ended GTL CATERR#
Single ended Asynchronous
CMOS Input
RESET#, PROCPWRGD, PWR_DEBUG# , VCCST_PWRGD
Single ended Asynchronous Bi-
directional
PECI
Single ended GTL Bi-directional CFG[19:0]
Voltage Regulator
Single ended VR Enable CMOS
Output
VR_EN
Single ended CMOS Input VR_READY
Single ended CMOS Input VIDALERT#
Single ended Open Drain Output VIDSCLK
Single ended CMOS I/O VIDSOUT
Differential Analog Output VCC_SENSE, VSS_SENSE
Power / Ground / Other
Single ended Power VCC, VDDQ, VCCST
Ground VSS
No Connect RSVD
Test Point RSVD_TP
Other DAISY_CHAIN_NCTF_[ball #]
continued...
Processor—Electrical Specifications
5th Generation Intel
®
Core
™
Processor Family, Intel
®
Core
™
M Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and
Mobile Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2 March 2015
86 Order No.: 330834-004v1