Datasheet

Revision History
Revision Description Date
001 • Initial Release September 2014
002
• Added Intel
®
Transactional Synchronization Extensions - New
Instructions (Intel
®
TSX-NI)
• Minor Updates throughout for clarity.
• Added 5th Generation Intel
®
Core
™
Processor Family
• Added Intel
®
Pentium
®
processor family
• Added Intel
®
Celeron
®
processor family
• AddedIntel
®
Core
™
M processor 5Y71, 5Y51, 5Y31, and 5Y10C
processors
• Updated Section 2.1, System Memory Interface
• Updated Section 2.1.1, System Memory Technology Supported
• Added Section 2.1.2, System Memory Timing Support
• Added Section 2.1.4, System Memory Frequency
• Updated Table 9, Multiple Display Configuration for Intel
®
Core
™
M Processor
• Updated Section 4.3.4, Package C-States. Added sentence to
Package C7 State sub-section.
• Added Section 4.2.6, Package C-States and Display Resolutions
• Updated Section 5.5, Thermal and Power Specifications
• Updated Section 6.11, Ground and Non-Critical to Function
(NCTF) Signals. Added package type to Signal Name.
• Updated Section 6.12, Processor Internal Pull-Up / Pull-Down
Terminations. Added table note.
• Updated Table 36, Processor Core Active and Idle Mode DC
Voltage and Current Specifications
• Added Chapter 9, Processor Ball and Signal Information
January 2015
003
• Updated Table 21, Thermal Design Power (TDP) Specifications
• Updated Table 40, Processor Core Active and Idle Mode DC
Voltage and Current Specifications. Note 3 is added to
"Operating voltage" row and "Idle voltage" row.
January 2015
004
• Added 5th Generation Intel
®
Core
™
processors i3-5020U and
i3-5015U
• Added Intel
®
Pentium
®
processor 3825U
March 2015
Revision History—Processor
5th Generation Intel
®
Core
™
Processor Family, Intel
®
Core
™
M Processor Family, Mobile Intel
®
Pentium
®
Processor Family, and
Mobile Intel
®
Celeron
®
Processor Family
March 2015 Datasheet – Volume 1 of 2
Order No.: 330834-004v1 9