Datasheet

Processor Configuration Registers
152 Datasheet, Volume 2
2RO 0b
Reserved for MRL Sensor Changed (MSC)
If an MRL sensor is implemented, this bit is set when a MRL Sensor state
change is detected. If an MRL sensor is not implemented, this bit must not be
set.
1RO 0b
Reserved for Power Fault Detected (PFD)
If a Power Controller that supports power fault detection is implemented, this
bit is set when the Power Controller detects a power fault at this slot. Note
that, depending on hardware capability, it is possible that a power fault can
be detected at any time, independent of the Power Controller Control setting
or the occupancy of the slot. If power fault detection is not supported, this bit
must not be set.
0RO 0b
Reserved for Attention Button Pressed (ABP)
If an Attention Button is implemented, this bit is set when the attention
button is pressed. If an Attention Button is not supported, this bit must not
be set.
B/D/F/Type: 0/1/0/PCI
Address Offset: BA–BBh
Reset Value: 0000h
Access: RO, RW1C
Bit Attr
Reset
Value
Description