Datasheet

Glossary Intel® Server Board S1400SP TPS
Revision 1.0
Intel order number G64248-001
146
Glossary
This appendix contains important terms used in the preceding chapters. For ease of use,
numeric entries are listed first (for example, “82460GX”) with alpha entries following (for
example, “AGP 4x”). Acronyms are then entered in their respective place, with non-acronyms
following.
Term
Definition
ACPI
Advanced Configuration and Power Interface
AES
Advanced Encryption Standard
AMB
Advanced Memory Buffer (there is an AMB on each FBDIMM)
APIC
Advanced Programmable Interrupt Controller
ARP
Address Resolution Protocol
ASF
Alert Standards Forum
ASIC
Application specific integrated circuit
BIST
Built-in self test
BMC
Baseboard management controller
Bridge
Circuitry connecting one computer bus to another, allowing an agent on one to access the other.
BSP
Bootstrap processor
CBC
Chassis bridge controller. A microcontroller connected to one or more other CBCs. Together they
bridge the IPMB buses of multiple chassis.
CLI
Command-line interface
CLTT
Closed-loop thermal throttling (memory throttling mode)
CMOS
In terms of this specification, this describes the PC-AT compatible region of battery-backed 128 bytes
of memory on the server board.
CSR
Control and status register
D-cache
Data cache. Processor-local cache dedicated for memory locations explicitly loaded and stored by
running code.
DHCP
Dynamic Host Configuration Protocol
DIB
Device Information Block
DPC
Direct Platform Control
EEPROM
Electrically erasable programmable read-only memory
EMP
Emergency management port
EPS
External Product Specification
FML
Fast management link
FNI
Fast management link network interface
FRB
Fault resilient booting
FRU
Field replaceable unit
FSB
Front side bus
FTM
Firmware transfer mode
GPIO
General-purpose input/output
HSBP
Hot-swap backplane
HSC
Hot-swap controller
I-cache
Instruction cache. Processor-local cache dedicated for memory locations retrieved through instruction
fetch operations.