Datasheet

BIOS Setup Program
123
Table 67. Chipset Configuration Submenu (continued)
Feature Options Description
CPC Override • Auto (default)
• Enabled
• Disabled
Controls the CPC/1n rule mode.
Enabled allows the DRAM controller to attempt chip
select assertions in two consecutive common clocks.
SDRAM Timing Control
(Note 1)
• Auto (default)
• Manual – Aggressive
• Manual – User Defined
Auto = Timings will be programmed according to the
memory detected.
Manual – Aggressive = Selects most aggressive
user-defined timings.
Manual – User Defined = Allows manual override of
detected SDRAM settings.
SDRAM RAS Active to
Precharge
(Note 4)
• 8
• 7
• 6 (default)
• 5
Corresponds to tRAS.
SDRAM CAS# Latency
(Note 4)
• 2.0
• 2.5 (default)
• 3.0
Selects the number of clock cycles required to
address a column in memory.
SDRAM RAS# to CAS#
Delay
(Note 4)
• 4
• 3 (default)
• 2
Selects the number of clock cycles between
addressing a row and addressing a column.
SDRAM RAS#
Precharge
(Note 4)
• 4
• 3 (default)
• 2
Selects the length of time required before accessing
a new row.
Notes:
1. This feature is displayed only if Extended Configuration is set to User Defined.
2. This option is displayed only if the installed processor has a 533 MHz system bus.
3. This option is displayed only if the installed processor has an 800 MHz system bus.
4. This feature is displayed only if SDRAM Timing Control is set to Manual – User Defined.