Datasheet

Processor Integrated I/O (IIO) Configuration Registers
120 Datasheet, Volume 2
3.4.4.15 LMMIOH.BASEU—Local MMIOH Base Upper
3.4.4.16 LMMIOH.LIMITU—Local MMIOH Limit Upper
3.4.4.17 LCFGBUS.BASE—Local Configuration Bus Number Base Register
Register: LMMIOH.BASEU
Device: 8
Function: 0
Offset: 114h
Bit Attr Default Description
31:19 RO 0000h
This field corresponds to address A[63:51] of the local MMIOH range and is
always 0.
18:0 RW 00000h
Local MMIOH Base Upper Address
This field corresponds to A[50:32] of MMIOH base. An inbound or outbound
memory address that satisfies ‘local MMIOH base upper[31:0]::local MMIOH
base[15:10] ≤ A[63:26] ≤ local MMIOH limit upper[31:0]::local MMIOH
limit[15:10]’ is treated as a local peer-to-peer transaction that does not cross
an Intel
QuickPath Interconnect link.
Setting LMMIOH.BASEU::LMMIOH.BASE greater than
LMMIOH.LIMITU::LMMIOH.LIMIT disables local MMIOH peer-to-peer.
This register is programmed once at boot time and does not change after that.
Register: LMMIOH.LIMITU
Device: 8
Function: 0
Offset: 118h
Bit Attr Default Description
31:19 RO 0000h
This field corresponds to address A[63:51] of the local MMIOH range and is
always 0.
18:0 RW 00000h
Local MMIOH Limit Upper Address
This field corresponds to A[50:32] of MMIOH limit. An inbound or outbound
memory address that satisfies ‘local MMIOH base upper[31:0]::local MMIOH
base[15:10] ≤ A[63:26] ≤ local MMIOH limit upper[31:0]::local MMIOH
limit[15:10]’ is treated as local a peer-to-peer transactions that does not cross
an Intel
QuickPath Interconnect link.
Setting LMMIOH.BASEU::LMMIOH.BASE greater than
LMMIOH.LIMITU::LMMIOH.LIMIT disables local MMIOH peer-to-peer.
This register is programmed once at boot time and does not change after that.
Register: LCFGBUS.BASE
Device: 8
Function: 0
Offset: 11Ch
Bit Attr Default Description
7:0 RW 00h
Local Configuration Bus Number Base
This field corresponds to base bus number of bus number range allocated to
the hierarchy below the Intel
QuickPath Interconnect link. An inbound or
outbound configuration tx falls within the local bus number range if ‘Local Bus
Number Base [7:0] ≤ Bus Number[7:0] ≤ Local Bus Number Limit [7:0]’ and
such transactions are treated as local peer-to-peer transactions that do not
cross an Intel
QuickPath Interconnect link.
Setting LCFGBUS.BASE greater than LCFGBUS.LIMIT disables local peer-to-
peer configuration cycles.
This register is programmed once at boot time and does not change after that.